[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Add 4 missing root ports to chipset dt

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48947 )

Change subject: soc/intel/skylake: Add 4 missing root ports to chipset dt
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Patch Set 3: Code-Review+2