Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35312 )
Change subject: soc/intel/common/block/sgx: Fix crash in MP init ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35312/9/src/soc/intel/common/block/... File src/soc/intel/common/block/sgx/sgx.c:
https://review.coreboot.org/c/coreboot/+/35312/9/src/soc/intel/common/block/... PS9, Line 73: : union { : uint64_t data64; : struct { : uint32_t lo; : uint32_t hi; : } data32; : } prmrr_base, prmrr_mask;
unrelated, but this should just be msr_t...
Done
https://review.coreboot.org/c/coreboot/+/35312/9/src/soc/intel/common/block/... PS9, Line 247: : /* : * Update just on the first CPU in the core. Other siblings : * get the update automatically according to Document: 253668-060US : * Intel SDM Chapter 9.11.6.3 : * "Update in a System Supporting Intel Hyper-Threading Technology" : * Intel Hyper-Threading Technology has implications on the loading of the : * microcode update. The update must be loaded for each core in a physical : * processor. Thus, for a processor supporting Intel Hyper-Threading : * Technology, only one logical processor per core is required to load the : * microcode update. Each individual logical processor can independently : * load the update. However, MP initialization must provide some mechanism : * (e.g. a software semaphore) to force serialization of microcode update : * loads and to prevent simultaneous load attempts to the same core. : */ : if (!intel_ht_sibling()) { : const void *microcode_patch = intel_mp_current_microcode(); : intel_microcode_load_unlocked(microcode_patch); : }
This should got to CB:35739
I don't see why. This commit fixes HT related issue in the SGX code.