Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41903 )
Change subject: vendorcode/intel/fsp/fsp2_0/cpx_sp: FSP ww24 release and soc change ......................................................................
Patch Set 14:
(6 comments)
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@7 PS14, Line 7: vendorcode/intel/fsp/fsp2_0/cpx_sp: FSP ww24 release and soc change Please make it a statement. Maybe:
Update to FSP ww24 release and adapt SOC
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@9 PS14, Line 9: ww22 Please mention what the currently used release is, so the numbers can be better understood.
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@12 PS14, Line 12: bootloader to skip memory training, works now. … saving … seconds on boot.
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@14 PS14, Line 14: added adds
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@17 PS14, Line 17: suh such
https://review.coreboot.org/c/coreboot/+/41903/14//COMMIT_MSG@21 PS14, Line 21: additin addition