build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38387 )
Change subject: soc/intel/{apl,cnl,icl,skl,tgl}: Update SA bit fields as per EDS ......................................................................
Patch Set 4:
(5 comments)
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/common/block/... File src/soc/intel/common/block/include/intelblocks/systemagent.h:
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/common/block/... PS4, Line 48: RESOURCE_TYPE_32BIT, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/common/block/... PS4, Line 48: RESOURCE_TYPE_32BIT, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/common/block/... PS4, Line 49: RESOURCE_TYPE_64BIT, code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/common/block/... PS4, Line 49: RESOURCE_TYPE_64BIT, please, no spaces at the start of a line
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/skylake/syste... File src/soc/intel/skylake/systemagent.c:
https://review.coreboot.org/c/coreboot/+/38387/4/src/soc/intel/skylake/syste... PS4, Line 49: "PCIEXBAR",RESOURCE_TYPE_64BIT }, space required after that ',' (ctx:VxV)