Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45860 )
Change subject: mb/google/volteer: Add a DPTF policy for Eldrid ......................................................................
Patch Set 21:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45860/21/src/mainboard/google/volte... File src/mainboard/google/volteer/variants/eldrid/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45860/21/src/mainboard/google/volte... PS21, Line 11: 105 Does this mean only PL4 has different values between U2-2 and U4-2 SoC types ? What about PL1 and PL2 values, please confirm.
https://review.coreboot.org/c/coreboot/+/45860/21/src/mainboard/google/volte... PS21, Line 89: 10 Update comment value according to below used value.
https://review.coreboot.org/c/coreboot/+/45860/21/src/mainboard/google/volte... PS21, Line 90: 64 Same comment as above.
https://review.coreboot.org/c/coreboot/+/45860/21/src/mainboard/google/volte... PS21, Line 103: ## Disable Fan Performance Control from baseboard : register "controls.fan_perf" = "{ : [0] = { 0, 0, 0, 0 }}" : : # Disable Fan options from baseboard : register "options.fan.fine_grained_control" = "0" : register "options.fan.step_size" = "0" Active policy already disabled at line 78 above. Do you still need this ?