Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38988 )
Change subject: mainboard: Add new board ASUS P8Z77-M ......................................................................
Patch Set 13:
(10 comments)
https://review.coreboot.org/c/coreboot/+/38988/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38988/11//COMMIT_MSG@7 PS11, Line 7: Ivy
nit: this board also supports Sandy Bridge CPUs
*wink*
https://review.coreboot.org/c/coreboot/+/38988/11//COMMIT_MSG@12 PS11, Line 12:
With which CPU did you test this port?
Added to commit message.
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/Kconfig:
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... PS11, Line 29: config MAX_CPUS : int : default 8
already set in cpu/intel/model_206ax
Done
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/cmos.layout:
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... PS11, Line 98: # gfx_uma_size (Intel IGP Video RAM size) : 7 0 32M : 7 1 64M : 7 2 96M : 7 3 128M : 7 4 160M : 7 5 192M : 7 6 224M : 7 7 256M : 7 8 288M : 7 9 320M : 7 10 352M : 7 11 384M : 7 12 416M : 7 13 448M : 7 14 480M : 7 15 512M : 7 16 544M : 7 17 576M : 7 18 608M : 7 19 640M : 7 20 672M : 7 21 704M : 7 22 736M : 7 23 768M : 7 24 800M : 7 25 832M : 7 26 864M : 7 27 896M : 7 28 928M : 7 29 960M : 7 30 992M
From "Document Number: 326765-005Desktop 3rd Generation Intel®Core™ Processor Family, Desktop Intel® […]
Intel's doc are hard to believe, with a substantial typo on the same page. Yes, I downloaded that doc today. I'll boot test more next week.
https://review.coreboot.org/c/coreboot/+/38988/6/src/mainboard/asus/p8z77-m/... File src/mainboard/asus/p8z77-m/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/38988/6/src/mainboard/asus/p8z77-m/... PS6, Line 25: #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
*poke*
Done
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/early_init.c:
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... PS10, Line 100: int
unsigned int
Done. But honestly, it doesn't make a difference.
https://review.coreboot.org/c/coreboot/+/38988/10/src/mainboard/asus/p8z77-m... PS10, Line 217: P8Z77-M Pro
Copypasta! 😄
Ack
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... File src/mainboard/asus/p8z77-m/early_init.c:
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... PS11, Line 48: static const u8 register_values[] = {
I'd strongly recommend adding some comment here explaining this is done to save some bytes. […]
If an entire comment block doesn't get the message through...
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... PS11, Line 89: /* This sequence enables early serial */ : SWITCH_TO, NCT6779D_SP1, : PNP_IDX_EN, 0, : PNP_IDX_IO0, CONFIG_TTYS0_BASE >> 8, : PNP_IDX_IO0 + 1, CONFIG_TTYS0_BASE & 0xff, : PNP_IDX_EN, 1,
nuvoton_enable_serial()
See above.
https://review.coreboot.org/c/coreboot/+/38988/11/src/mainboard/asus/p8z77-m... PS11, Line 165: pei->usb_port_config = { : /* {enabled, oc_pin, cable len 0x0080=<8inches/20cm} */ : { 1, 0, 0x0080 }, : { 1, 0, 0x0080 }, : { 1, 1, 0x0080 }, : { 1, 1, 0x0080 }, : { 1, 2, 0x0080 }, : { 1, 2, 0x0080 }, : { 1, 3, 0x0080 }, : { 1, 3, 0x0080 }, : { 1, 4, 0x0080 }, : { 1, 4, 0x0080 }, : { 1, 6, 0x0080 }, : { 1, 5, 0x0080 }, : { 1, 5, 0x0080 }, : { 1, 6, 0x0080 } : };
I don't think this compiles.
Now it should, that it has been redone.