[coreboot-gerrit] Change in coreboot[master]: src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL

[Shreesh Chhabbi (Code Review)]

Shreesh Chhabbi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48286 )

Change subject: src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL
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Patch Set 18:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48286/18//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48286/18//COMMIT_MSG@15 
PS18, Line 15: 32:33
> That's a good point. Teardown path does not take into account COS_MAPPED_TO_MSB.

Doesn't below code make edx Bits[0:1] = 00b and contents of edx will be written to Bits[32:63] of MSR?

and	$~IA32_PQR_ASSOC_MASK, %edx
    wrmsr

IA32_PQR_ASSOC_MASK is defined as below. It has the value 0x3.
#define   IA32_PQR_ASSOC_MASK		(1 << 0 | 1 << 1)