[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Add configurable value for UsbTcPortEn

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Selma Bensaid, Sridhar Siricilla, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54334 )

Change subject: soc/intel/alderlake: Add configurable value for UsbTcPortEn
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Patch Set 2:

(1 comment)

File src/soc/intel/alderlake/chip.h:

https://review.coreboot.org/c/coreboot/+/54334/comment/6b9f2e3f_97af7d81 
PS2, Line 48: uint8_t UsbTcPortEn;
suggestion: an array of `bool` would be a nicer interface than raw bitmask, e.g.
```
bool typec_port_enable[MAX_TYPE_C_PORTS];
```