[coreboot-gerrit] Change in coreboot[master]: mediatek/mt8183: set scp voltage setting

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34205 )

Change subject: mediatek/mt8183: set scp voltage setting
......................................................................

mediatek/mt8183: set scp voltage setting

Add scp initial voltage setting

BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui and scp can boot up normally

Change-Id: I5afb60af3c14490e20f28f1c089cfca42ddf7fcf
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/mt6358.c
1 file changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/34205/1

diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index 53d2a43..8d2375a 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -501,6 +501,26 @@
    {0x13a6, 0x58, 0x7F, 0},
    /* [6:0]: RG_BUCK_VPROC12_VOSEL */
    {0x1426, 0x58, 0x7F, 0},
+
+	/* scp voltage initialization */
+	/* [6:0]: RG_BUCK_VCORE_SSHUB_VOSEL */
+	{0x14A6, 0x20, 0x7F, 0},
+	/* [14:8]: RG_BUCK_VCORE_SSHUB_VOSEL_SLEEP */
+	{0x14A6, 0x20, 0x7F, 8},
+	/* [0:0]: RG_BUCK_VCORE_SSHUB_EN */
+	{0x14A4, 0x1, 0x1, 0},
+	/* [1:1]: RG_BUCK_VCORE_SSHUB_SLEEP_VOSEL_EN */
+	{0x14A4, 0x0, 0x1, 1},
+	/* [6:0]: RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL */
+	{0x1BC6, 0x40, 0x7F, 0},
+	/* [14:8]: RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP */
+	{0x1BC6, 0x40, 0x7F, 8},
+	/* [0:0]: RG_LDO_VSRAM_OTHERS_SSHUB_EN */
+	{0x1BC4, 0x1, 0x1, 0},
+	/* [1:1]: RG_LDO_VSRAM_OTHERS_SSHUB_SLEEP_VOSEL_EN */
+	{0x1BC4, 0x0, 0x1, 1},
+	/* [4:4]: RG_SRCVOLTEN_LP_EN */
+	{0x134, 0x1, 0x1, 4},
 };

static struct pmic_setting lp_setting[] = {