Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45796 )
Change subject: soc/intel: Make use of PMC low power program from common block ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45796/3/src/soc/intel/cannonlake/fi... File src/soc/intel/cannonlake/finalize.c:
https://review.coreboot.org/c/coreboot/+/45796/3/src/soc/intel/cannonlake/fi... PS3, Line 43: static void pch_finalize(void)
Yes Angel, only because of CNL platform, right now i'm unable to move this code into common, bt will […]
Alright. CNL (Cannon Lake, the 10nm one) is not very popular: the i3-8121U [1] is the only CNL part that was released. And since there's no FSP for Cannon Lake in the public Intel FSP repo [2], we might as well drop support for CNL in coreboot.
Skylake is also different in some ways, but we can still take care of it.
[1]: https://ark.intel.com/content/www/us/en/ark/products/136863/intel-core-i3-81... [2]: https://github.com/intel/FSP