[coreboot-gerrit] Change in ...coreboot[master]: Enable SOC_INTEL_DISABLE_DYNAMIC_CLOCK_LOCAL_GATING if !SOC_INTEL_SKY...

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32789

Change subject: Enable SOC_INTEL_DISABLE_DYNAMIC_CLOCK_LOCAL_GATING if !SOC_INTEL_SKYLAKE
......................................................................

Enable SOC_INTEL_DISABLE_DYNAMIC_CLOCK_LOCAL_GATING if !SOC_INTEL_SKYLAKE

Additional gpio pm programming logic has been added since CNP PCH hence
selecting this feature for all PCH family beyond SPT PCH.

BUG=b:130764684
TEST=Able to build and boot ICL and CML.

Change-Id: Ic30a490aadb8cc9c05a19a05533ab0196c69b7f1
Signed-off-by: Subrata Banik 
---
M src/soc/intel/common/pch/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/32789/1

diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig
index a832742..0c654bc 100644
--- a/src/soc/intel/common/pch/Kconfig
+++ b/src/soc/intel/common/pch/Kconfig
@@ -44,5 +44,6 @@
    select SOC_INTEL_COMMON_BLOCK_XDCI
    select SOC_INTEL_COMMON_BLOCK_XHCI
    select SOC_INTEL_COMMON_PCH_LOCKDOWN
+	select SOC_INTEL_DISABLE_DYNAMIC_CLOCK_LOCAL_GATING if !SOC_INTEL_SKYLAKE

endif