Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38514 )
Change subject: soc/intel/skylake: Update 64 bit SA DRAM bit fields as per SKL EDS ......................................................................
Patch Set 2: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/38514/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38514/2//COMMIT_MSG@7 PS2, Line 7: EDS Note: The datasheet vol 2 (doc 332688) has the same values. It's not a surprise, though: the datasheets are derived from the EDS.
https://review.coreboot.org/c/coreboot/+/38514/2/src/soc/intel/skylake/acpi/... File src/soc/intel/skylake/acpi/systemagent.asl:
https://review.coreboot.org/c/coreboot/+/38514/2/src/soc/intel/skylake/acpi/... PS2, Line 46: 28 The datasheet (doc 332688) says that bits 27 and 26 are either part of the PCIEXBAR field or part of the addres mask depending on the value of LENGTH (ACPI PXSZ) field. Does it matter much?