Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held.
Hello Martin Roth,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/68194
to review the following change.
Change subject: soc/amd/common: Add morgana SoC to psp_efs.h ......................................................................
soc/amd/common: Add morgana SoC to psp_efs.h
This adds the morgana chip to the EFS table, but it is simply adding the name so that morgana builds, this is NOT the final and correct code.
Signed-off-by: Martin Roth martin.roth@amd.corp-partner.google.com Change-Id: I17d9bda1b6010e44c188b134ee17cbfff5071c7a --- M src/soc/amd/common/block/include/amdblocks/psp_efs.h 1 file changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/68194/1
diff --git a/src/soc/amd/common/block/include/amdblocks/psp_efs.h b/src/soc/amd/common/block/include/amdblocks/psp_efs.h index 1f93807..bbd4169 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp_efs.h +++ b/src/soc/amd/common/block/include/amdblocks/psp_efs.h @@ -16,7 +16,8 @@ #elif CONFIG(SOC_AMD_PICASSO) #define SPI_MODE_FIELD spi_readmode_f17_mod_00_2f #define SPI_SPEED_FIELD spi_fastspeed_f17_mod_00_2f -#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO) +/* TODO: Update for Morgana */ +#elif CONFIG(SOC_AMD_CEZANNE) | CONFIG(SOC_AMD_MENDOCINO) | CONFIG(SOC_AMD_MORGANA) #define SPI_MODE_FIELD spi_readmode_f17_mod_30_3f #define SPI_SPEED_FIELD spi_fastspeed_f17_mod_30_3f #else