[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd/mendocino: Enhence DPTC_INPUT to support 16 DPTC thermal para...

[Tim Van Patten (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, EricKY Cheng, Matt DeVillier, Fred Reitberger, Felix Held.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68649 )

Change subject: soc/amd/mendocino: Enhence DPTC_INPUT to support 16 DPTC thermal parameters
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Patch Set 6:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/68649/comment/721cb65e_6bc1d7b5 
PS6, Line 7: Enhence
typo

File src/soc/amd/mendocino/root_complex.c:

https://review.coreboot.org/c/coreboot/+/68649/comment/9892fa4c_c50416cc 
PS6, Line 32: stt_AlphaApu
nit: `_sttAlphaApu`

https://review.coreboot.org/c/coreboot/+/68649/comment/cba36e83_42e739dc 
PS6, Line 46: _sustained
`_spptTimeConst`

https://review.coreboot.org/c/coreboot/+/68649/comment/6f1e32f2_815f2e0f 
PS6, Line 86: _sttSkinTempLimit
nit: `_sttSkinTempLimitApu`