[coreboot-gerrit] Change in coreboot[master]: superio/nuvoton: Remove unneeded white spaces

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39930 )

Change subject: superio/nuvoton: Remove unneeded white spaces
......................................................................

superio/nuvoton: Remove unneeded white spaces

Change-Id: I8cdfa5c3e3508ea8ad969df6513401611a066fc5
Signed-off-by: Elyes HAOUAS 
---
M src/superio/nuvoton/nct5104d/nct5104d.h
M src/superio/nuvoton/npcd378/npcd378.h
M src/superio/nuvoton/npcd378/superio.c
3 files changed, 4 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/39930/1

diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index b65e805..679b21a 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -26,7 +26,7 @@
 #define NCT5104D_FDC        0x00 /* FDC - not pinned out */
 #define NCT5104D_SP1        0x02 /* UARTA */
 #define NCT5104D_SP2        0x03 /* UARTB */
-#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select  */
+#define NCT5104D_GPIO_PP_OD 0x0F /* GPIO Push-Pull / Open drain select */
 #define NCT5104D_SP3        0x10 /* UARTC */
 #define NCT5104D_SP4        0x11 /* UARTD */
 #define NCT5104D_PORT80     0x14 /* PORT 80 */
diff --git a/src/superio/nuvoton/npcd378/npcd378.h b/src/superio/nuvoton/npcd378/npcd378.h
index f2fd87b..98d50e5 100644
--- a/src/superio/nuvoton/npcd378/npcd378.h
+++ b/src/superio/nuvoton/npcd378/npcd378.h
@@ -31,8 +31,7 @@
  * @param reg MSB is page, LSB sets the offset in selected page
  * @param val The value to write to HWM register
  */
-void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg,
-		       const uint8_t val);
+void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val);

/*
  * Notify SuperIO a host-to-device transfer is ongoing.
diff --git a/src/superio/nuvoton/npcd378/superio.c b/src/superio/nuvoton/npcd378/superio.c
index a07afdc..95a4bab 100644
--- a/src/superio/nuvoton/npcd378/superio.c
+++ b/src/superio/nuvoton/npcd378/superio.c
@@ -26,8 +26,7 @@
    return reg8;
 }

-void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg,
-		       const uint8_t val)
+void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val)
 {
    outb((reg >> 8) & 0xf, iobase + 0xff);
    outb(val, iobase + (reg & 0xff));
@@ -65,8 +64,7 @@
    case NPCD378_HWM:
    	res = find_resource(dev, PNP_IDX_IO0);
    	if (!res || !res->base) {
-			printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n",
-			       NPCD378_HWM);
+			printk(BIOS_ERR, "NPCD378: LDN%u IOBASE not set.\n", NPCD378_HWM);
    		break;
    	}