Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52682 )
Change subject: mb/amd/majolica:Set IRQ for GPIO controller ......................................................................
mb/amd/majolica:Set IRQ for GPIO controller
AMD GPIO driver will not load if IRQ is not set. As a consequence, it does not clear the interrupt when waking from S0i3.
BUG=178728116 TEST=Perform 2 S0i3 cycles, confirming second cycle does not return instantly due to first interrupt not being cleared.
Change-Id: I3072263e8e68f939a47ed4125444c60133087824 Signed-off-by: Jason Glenesk jason.glenesk@amd.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/52682 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org --- M src/mainboard/amd/majolica/mainboard.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 1a7be4b..2dd2d57 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -52,7 +52,7 @@ { PIRQ_SDIO, PIRQ_NC, PIRQ_NC }, { PIRQ_SATA, PIRQ_NC, PIRQ_NC }, { PIRQ_EMMC, PIRQ_NC, PIRQ_NC }, - { PIRQ_GPIO, PIRQ_NC, PIRQ_NC }, + { PIRQ_GPIO, 7, 7 }, { PIRQ_I2C2, PIRQ_NC, PIRQ_NC }, { PIRQ_I2C3, PIRQ_NC, PIRQ_NC }, { PIRQ_UART0, 4, 4 },