Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38067 )
Change subject: mb/asus/p5qpl-am/devicetree.cb: Do minor cosmetic fixes ......................................................................
mb/asus/p5qpl-am/devicetree.cb: Do minor cosmetic fixes
Use lowercase for hex constants, inline a lone `end` and align a comment.
Change-Id: Ibf3882dd134d33611138c2a9f89a3b2b37c136b4 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38067 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de --- M src/mainboard/asus/p5qpl-am/devicetree.cb 1 file changed, 3 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/src/mainboard/asus/p5qpl-am/devicetree.cb b/src/mainboard/asus/p5qpl-am/devicetree.cb index 5012f88..fb3366c 100644 --- a/src/mainboard/asus/p5qpl-am/devicetree.cb +++ b/src/mainboard/asus/p5qpl-am/devicetree.cb @@ -21,14 +21,14 @@ device lapic 0 on end end chip cpu/intel/model_1067x # CPU - device lapic 0xACAC off end + device lapic 0xacac off end end end device domain 0 on # PCI domain device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 on end # Integrated graphics controller - chip southbridge/intel/i82801gx # Southbridge + chip southbridge/intel/i82801gx # Southbridge register "pirqa_routing" = "0x0b" register "pirqb_routing" = "0x0b" register "pirqc_routing" = "0x0b" @@ -50,8 +50,7 @@ device pci 1b.0 on end # Audio device pci 1c.0 on end # PCIe 1: PCIe x1 slot device pci 1c.1 on # PCIe 2: NIC - device pci 00.0 on - end + device pci 00.0 on end end device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4