Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74601 )
Change subject: ACPI: Make FADT entries for RTC/CMOS architectural ......................................................................
ACPI: Make FADT entries for RTC/CMOS architectural
For AMD, replace name RTC_ALT_CENTURY with RTC_CLK_ALTCENTURY that points to same offset. Since the century field inside RTC falls within the NVRAM space, and could interfere with OPTION_TABLE, it is now guarded with config USE_PC_CMOS_ALTCENTURY.
There were no reference for the use of offset 0x48 for century.
Change-Id: I965a83dc8daaa02ad0935bdde5ca50110adb014a Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/74601 Reviewed-by: Elyes Haouas ehaouas@noos.fr Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/acpi/acpi.c M src/arch/x86/acpi.c M src/include/pc80/mc146818rtc.h M src/soc/amd/cezanne/acpi.c M src/soc/amd/cezanne/include/soc/acpi.h M src/soc/amd/glinda/acpi.c M src/soc/amd/glinda/include/soc/acpi.h M src/soc/amd/mendocino/acpi.c M src/soc/amd/mendocino/include/soc/acpi.h M src/soc/amd/phoenix/acpi.c M src/soc/amd/phoenix/include/soc/acpi.h M src/soc/amd/picasso/acpi.c M src/soc/amd/picasso/include/soc/acpi.h M src/soc/amd/stoneyridge/acpi.c M src/soc/amd/stoneyridge/include/soc/acpi.h M src/soc/intel/baytrail/fadt.c M src/soc/intel/braswell/fadt.c M src/soc/intel/broadwell/pch/fadt.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/xeon_sp/skx/soc_acpi.c M src/southbridge/amd/pi/hudson/fadt.c M src/southbridge/intel/bd82x6x/fadt.c M src/southbridge/intel/i82371eb/fadt.c M src/southbridge/intel/i82801dx/fadt.c M src/southbridge/intel/i82801gx/fadt.c M src/southbridge/intel/i82801ix/fadt.c M src/southbridge/intel/i82801jx/fadt.c M src/southbridge/intel/ibexpeak/fadt.c M src/southbridge/intel/lynxpoint/fadt.c 29 files changed, 39 insertions(+), 66 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Elyes Haouas: Looks good to me, approved
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index e06ac47..a57d498 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1748,9 +1748,6 @@
fadt->preferred_pm_profile = acpi_get_preferred_pm_profile();
- if (CONFIG(USE_PC_CMOS_ALTCENTURY)) - fadt->century = RTC_CLK_ALTCENTURY; - fadt->sci_int = acpi_sci_int();
arch_fill_fadt(fadt); diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index e1ef978..ffa3463 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -3,6 +3,7 @@ #include <acpi/acpi.h> #include <cf9_reset.h> #include <cpu/x86/smm.h> +#include <pc80/mc146818rtc.h>
void arch_fill_fadt(acpi_fadt_t *fadt) { @@ -24,4 +25,14 @@ fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; } + + if (CONFIG(PC80_SYSTEM)) { + /* Currently these are defined to support date alarm only. */ + fadt->day_alrm = RTC_DATE_ALARM; + fadt->mon_alrm = RTC_MONTH_ALARM; + } + + /* Careful with USE_OPTION_TABLE. */ + if (CONFIG(USE_PC_CMOS_ALTCENTURY)) + fadt->century = RTC_CLK_ALTCENTURY; } diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 2f94cc0..383c41f 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -93,6 +93,9 @@ #define RTC_CLK_YEAR 9 #define RTC_CLK_ALTCENTURY 0x32
+#define RTC_DATE_ALARM RTC_REG_D +#define RTC_MONTH_ALARM 0 + /* On PCs, the checksum is built only over bytes 16..45 */ #define PC_CKS_RANGE_START 16 #define PC_CKS_RANGE_END 45 diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 07cdcbf..ee344cc 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -50,8 +50,6 @@
fill_fadt_extended_pm_regs(fadt);
- fadt->day_alrm = RTC_DATE_ALARM; - fadt->century = RTC_ALT_CENTURY; fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/cezanne/include/soc/acpi.h b/src/soc/amd/cezanne/include/soc/acpi.h index ab90c96..1a0e2a1 100644 --- a/src/soc/amd/cezanne/include/soc/acpi.h +++ b/src/soc/amd/cezanne/include/soc/acpi.h @@ -10,11 +10,6 @@
#define ACPI_SCI_IRQ 9
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d -#define RTC_ALT_CENTURY 0x32 -#define RTC_CENTURY 0x48 - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp);
diff --git a/src/soc/amd/glinda/acpi.c b/src/soc/amd/glinda/acpi.c index df86296..221e7df 100644 --- a/src/soc/amd/glinda/acpi.c +++ b/src/soc/amd/glinda/acpi.c @@ -52,8 +52,6 @@
fill_fadt_extended_pm_regs(fadt);
- fadt->day_alrm = RTC_DATE_ALARM; - fadt->century = RTC_ALT_CENTURY; fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/glinda/include/soc/acpi.h b/src/soc/amd/glinda/include/soc/acpi.h index 69e2f87..138086e 100644 --- a/src/soc/amd/glinda/include/soc/acpi.h +++ b/src/soc/amd/glinda/include/soc/acpi.h @@ -12,11 +12,6 @@
#define ACPI_SCI_IRQ 9
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d -#define RTC_ALT_CENTURY 0x32 -#define RTC_CENTURY 0x48 - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp);
diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 7e703c0..0adf659 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -51,8 +51,6 @@
fill_fadt_extended_pm_regs(fadt);
- fadt->day_alrm = RTC_DATE_ALARM; - fadt->century = RTC_ALT_CENTURY; fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/mendocino/include/soc/acpi.h b/src/soc/amd/mendocino/include/soc/acpi.h index 45e8a1b..ac3c490 100644 --- a/src/soc/amd/mendocino/include/soc/acpi.h +++ b/src/soc/amd/mendocino/include/soc/acpi.h @@ -10,11 +10,6 @@
#define ACPI_SCI_IRQ 9
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d -#define RTC_ALT_CENTURY 0x32 -#define RTC_CENTURY 0x48 - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp);
diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c index 09d7b8b..9a30225 100644 --- a/src/soc/amd/phoenix/acpi.c +++ b/src/soc/amd/phoenix/acpi.c @@ -52,8 +52,6 @@
fill_fadt_extended_pm_regs(fadt);
- fadt->day_alrm = RTC_DATE_ALARM; - fadt->century = RTC_ALT_CENTURY; fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/phoenix/include/soc/acpi.h b/src/soc/amd/phoenix/include/soc/acpi.h index dc09a1d..823b9ce8 100644 --- a/src/soc/amd/phoenix/include/soc/acpi.h +++ b/src/soc/amd/phoenix/include/soc/acpi.h @@ -12,11 +12,6 @@
#define ACPI_SCI_IRQ 9
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d -#define RTC_ALT_CENTURY 0x32 -#define RTC_CENTURY 0x48 - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp);
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 366751f..38dcaff 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -56,7 +56,6 @@
fill_fadt_extended_pm_regs(fadt);
- fadt->day_alrm = RTC_DATE_ALARM; fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index 741b732..3b83123 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -10,9 +10,6 @@
#define ACPI_SCI_IRQ 9
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp);
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index b3895b3..dc64e66 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -54,7 +54,6 @@
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = RTC_DATE_ALARM; fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h index 302416e..0065d6e 100644 --- a/src/soc/amd/stoneyridge/include/soc/acpi.h +++ b/src/soc/amd/stoneyridge/include/soc/acpi.h @@ -14,9 +14,6 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif
-/* RTC Registers */ -#define RTC_DATE_ALARM 0x0d - const char *soc_acpi_name(const struct device *dev);
#endif /* AMD_STONEYRIDGE_ACPI_H */ diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c index 8a2831b..18ae68b 100644 --- a/src/soc/intel/baytrail/fadt.c +++ b/src/soc/intel/baytrail/fadt.c @@ -22,8 +22,6 @@ fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS); - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c index 526f797..b3cbd7e 100644 --- a/src/soc/intel/braswell/fadt.c +++ b/src/soc/intel/braswell/fadt.c @@ -23,8 +23,6 @@ fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS); - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | diff --git a/src/soc/intel/broadwell/pch/fadt.c b/src/soc/intel/broadwell/pch/fadt.c index 9a4c036..f67ab37 100644 --- a/src/soc/intel/broadwell/pch/fadt.c +++ b/src/soc/intel/broadwell/pch/fadt.c @@ -22,8 +22,6 @@ fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 32; - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 9722881..e65e24d 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -106,7 +106,6 @@ /* GPE0 STS/EN pairs each 32 bits wide. */ fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t);
- fadt->day_alrm = 0xd;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index 39dbd4a..fc00dcb 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -47,8 +47,6 @@ fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4;
- /* RTC Registers */ - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
/* PM2 Control Registers */ diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index dfe9986..ff46857 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -38,8 +38,6 @@
fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = 0; /* 0x7d these have to be */ - fadt->mon_alrm = 0; /* 0x7e added to cmos.layout */ fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-10 ACPI 3.0a spec */ diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index e76682d..b0d719f 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -25,8 +25,6 @@ fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16;
- fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 00e204e..43e119b 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -31,8 +31,7 @@
fadt->duty_offset = 1; /* bit 1:3 in PCNTRL reg (pmbase+0x10) */ fadt->duty_width = 3; /* this width is in bits */ - fadt->day_alrm = 0x0d; /* rtc CMOS RAM offset */ - fadt->mon_alrm = 0x0; /* not supported */ + /* * bit meaning * 0 1: We have user-visible legacy devices diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index e5ad336..56c3cc7 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -19,8 +19,6 @@ fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 8;
- fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c index ccbc504..0da488d 100644 --- a/src/southbridge/intel/i82801gx/fadt.c +++ b/src/southbridge/intel/i82801gx/fadt.c @@ -33,8 +33,7 @@ fadt->duty_width = 3; else fadt->duty_width = 0; - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; + fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES; fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index bcd7d90..ee861fd 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -26,8 +26,7 @@ fadt->p_lvl3_lat = 0x39; fadt->duty_offset = 1; fadt->duty_width = 3; - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; + fadt->iapc_boot_arch = ACPI_FADT_LEGACY_FREE; fadt->flags |= ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE | diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index 73d7ea0..ca5dfeb 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -26,8 +26,7 @@ fadt->p_lvl3_lat = 0; /* FIXME: Is this correct? */ fadt->duty_offset = 1; fadt->duty_width = 0; - fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; + fadt->iapc_boot_arch = ACPI_FADT_8042 | ACPI_FADT_LEGACY_DEVICES; fadt->flags |= (ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | ACPI_FADT_S4_RTC_WAKE diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index d750890..44ee59a 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -25,8 +25,6 @@ fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16;
- fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD | diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c index eaea091..d83c58f 100644 --- a/src/southbridge/intel/lynxpoint/fadt.c +++ b/src/southbridge/intel/lynxpoint/fadt.c @@ -37,8 +37,6 @@ else fadt->gpe0_blk_len = 2 * 8;
- fadt->day_alrm = 0xd; - fadt->mon_alrm = 0x00; fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
fadt->flags |= ACPI_FADT_WBINVD |