[coreboot-gerrit] New patch to review for coreboot: bc6fadd OxPCIe952: Fix read8/write8 argument

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8660

-gerrit

commit bc6fadd825524ccdbcba91daae8aafc34abfe625
Author: Kyösti Mälkki 
Date:   Thu Mar 12 11:33:14 2015 +0200

OxPCIe952: Fix read8/write8 argument

This was missed in commit bde6d309 as the driver is not enabled
    in any configuration by default.

Change-Id: I3d886531f5bcf013fc22ee0a1e8fa250d7c4c1a4
    Signed-off-by: Kyösti Mälkki 
---
 src/drivers/uart/oxpcie.c      | 5 +++--
 src/drivers/uart/uart8250mem.c | 4 ++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c
index 76119d2..af4afa9 100644
--- a/src/drivers/uart/oxpcie.c
+++ b/src/drivers/uart/oxpcie.c
@@ -34,11 +34,12 @@ static void oxford_oxpcie_enable(device_t dev)
    	printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n");
    	return;
    }
+	void *bar0 = (void*)(uintptr_t) res->base;

printk(BIOS_DEBUG, "OXPCIe952: Class=%x Revision ID=%x\n",
-			(read32(res->base) >> 8), (read32(res->base) & 0xff));
+			(read32(bar0) >> 8), (read32(bar0) & 0xff));
    printk(BIOS_DEBUG, "OXPCIe952: %d UARTs detected.\n",
-			(read32(res->base + 4) & 3));
+			(read32(bar0 + 4) & 3));
    printk(BIOS_DEBUG, "OXPCIe952: UART BAR: 0x%x\n", (u32)res->base);
 }

diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c
index 5fbbeec..cb70700 100644
--- a/src/drivers/uart/uart8250mem.c
+++ b/src/drivers/uart/uart8250mem.c
@@ -36,12 +36,12 @@

static uint8_t uart8250_read(void *base, uint8_t reg)
 {
-	return read8((uintptr_t) (base + reg));
+	return read8(base + reg);
 }

static void uart8250_write(void *base, uint8_t reg, uint8_t data)
 {
-	write8((uintptr_t) (base + reg), data);
+	write8(base + reg, data);
 }

static int uart8250_mem_can_tx_byte(void *base)