[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/meteorlake: Adjust Power State Current 2 threshold

[Jérémy Compostella (Code Review)]

Attention is currently required from: Eran Mitrani, Jérémy Compostella, Kapil Porwal, Shelley Chen, Tarun.

Hello Eran Mitrani, Kapil Porwal, Shelley Chen, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78653?usp=email

to look at the new patch set (#3).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/meteorlake: Adjust Power State Current 2 threshold
......................................................................

soc/intel/meteorlake: Adjust Power State Current 2 threshold

VccSA Power State 2 (PS2) current threshold has be adjusted to 10A to
improve PS2 residency which reduces Voltage Regular (VR) power loss.

BUG=b:308002192
TEST=power and performance analysis shows a positive Load Line result

Change-Id: I2da2b05de8a04f91dacaa55062165c4351422865
Signed-off-by: Jeremy Compostella 
---
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/chipset.cb
M src/soc/intel/meteorlake/romstage/fsp_params.c
3 files changed, 34 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/78653/3