Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5669
-gerrit
commit 93f96d44bff7848147aeb13cc9b0135af5ce656b Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Tue May 6 23:53:09 2014 +1000
southbridge/amd/sb?00/lpc.c: Move i8254/i8259 down in southbridge
We should configure i8254/i8259 down in to the southbridge rather than romstage of every AGESA/CIMx board much like Intel boards do.
Change-Id: Id7c4f0baa0819d52aef9b0ee03c20d0fa16b9352 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/amd/dinar/romstage.c | 10 ---------- src/mainboard/amd/inagua/romstage.c | 10 ---------- src/mainboard/amd/olivehill/romstage.c | 9 --------- src/mainboard/amd/parmer/romstage.c | 10 ---------- src/mainboard/amd/persimmon/romstage.c | 10 ---------- src/mainboard/amd/thatcher/romstage.c | 10 ---------- src/mainboard/amd/torpedo/romstage.c | 13 ------------- src/mainboard/asrock/e350m1/romstage.c | 10 ---------- src/mainboard/asrock/imb-a180/romstage.c | 9 --------- src/mainboard/asus/f2a85-m/romstage.c | 11 ----------- src/mainboard/gizmosphere/gizmo/romstage.c | 10 ---------- src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 11 ----------- src/mainboard/jetway/nf81-t56n-lf/romstage.c | 12 ------------ src/mainboard/lippert/frontrunner-af/romstage.c | 10 ---------- src/mainboard/lippert/toucan-af/romstage.c | 10 ---------- src/mainboard/supermicro/h8scm/romstage.c | 10 ---------- src/mainboard/tyan/s8226/romstage.c | 4 ---- src/southbridge/amd/cimx/sb700/late.c | 5 +++++ src/southbridge/amd/cimx/sb800/late.c | 5 +++++ src/southbridge/amd/cimx/sb900/late.c | 5 +++++ 20 files changed, 15 insertions(+), 169 deletions(-)
diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c index 776ecd5..8ed1398 100644 --- a/src/mainboard/amd/dinar/romstage.c +++ b/src/mainboard/amd/dinar/romstage.c @@ -32,8 +32,6 @@ #include "superio/smsc/sch4037/sch4037_early_init.c" #include "superio/smsc/sio1036/sio1036_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include "nb_cimx.h" #include <sb_cimx.h> #include "Platform.h" @@ -140,14 +138,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) }
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x43); print_debug("Disabling cache as ram "); disable_cache_as_ram(); diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c index 98c74d6..a304d31 100644 --- a/src/mainboard/amd/inagua/romstage.c +++ b/src/mainboard/amd/inagua/romstage.c @@ -35,8 +35,6 @@ #include "cpu/x86/bist.h" #include "superio/smsc/kbc1100/kbc1100_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <sb_cimx.h> #include "SBPLATFORM.h"
@@ -112,14 +110,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) else printk(BIOS_DEBUG, "passed.\n");
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259(); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254(); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 6422393..73cd40a 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -34,8 +34,6 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" #include "cbmem.h"
@@ -160,13 +158,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xEA, 0xCD6); outb(0x1, 0xcd7); - /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 ();
post_code(0x50); copy_and_run(); diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index a5d041f..668dfc8 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -34,8 +34,6 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" #include "cbmem.h"
@@ -141,14 +139,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x50); copy_and_run();
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index 47c03ec..9ba34e7 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -35,8 +35,6 @@ #include <superio/fintek/common/fintek.h> #include <superio/fintek/f81865f/f81865f.h> #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" @@ -170,14 +168,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x43); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x44); - setup_i8254 (); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 9c3cf5b..1a7a399 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -35,8 +35,6 @@ #include "southbridge/amd/agesa/hudson/hudson.h" #include "src/superio/smsc/lpc47n217/early_serial.c" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" #include "cbmem.h"
#define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) @@ -158,14 +156,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x50); copy_and_run();
diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index 58b88d0..dcab52b 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -32,8 +32,6 @@ #include "cpu/x86/bist.h" #include "superio/smsc/kbc1100/kbc1100_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include "sb_cimx.h" #include "SbPlatform.h" #include <arch/cpu.h> @@ -112,17 +110,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) else printk(BIOS_DEBUG, "passed.\n");
- /* Initialize i8259 pic */ - post_code(0x41); - printk(BIOS_DEBUG, "setup_i8259\n"); - setup_i8259(); - - /* Initialize i8254 timers */ - post_code(0x42); - printk(BIOS_DEBUG, "setup_i8254\n"); - setup_i8254(); - - post_code(0x43); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run returned!\n"); diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index ba2e34d..2913c08 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -35,8 +35,6 @@ #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <sb_cimx.h> #include "SBPLATFORM.h"
@@ -115,14 +113,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) else printk(BIOS_DEBUG, "passed.\n");
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259(); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254(); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 59d95f9..5b64cf9 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -34,8 +34,6 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" #include "cbmem.h" #include "superio/winbond/w83627uhg/early_serial.c"
@@ -184,13 +182,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
outb(0xEA, 0xCD6); outb(0x1, 0xcd7); - /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 ();
post_code(0x50); copy_and_run(); diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 487f068..ffd91bf 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -38,9 +38,6 @@ #include <string.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> -/* TODO: remove .c includes */ -#include <drivers/pc80/i8254.c> -#include <drivers/pc80/i8259.c>
#define MMIO_NON_POSTED_START 0xfed00000 #define MMIO_NON_POSTED_END 0xfedfffff @@ -201,14 +198,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x50); copy_and_run();
diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c index f639d1f..11ae623 100755 --- a/src/mainboard/gizmosphere/gizmo/romstage.c +++ b/src/mainboard/gizmosphere/gizmo/romstage.c @@ -33,8 +33,6 @@ #include "cpu/amd/car.h" #include "agesawrapper.h" #include "cpu/x86/bist.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" @@ -178,14 +176,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x43); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x44); - setup_i8254 (); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c index 24751f4..2be2bc5 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c @@ -34,9 +34,6 @@ #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h>
-#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; @@ -139,14 +136,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x50); copy_and_run();
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 8c05236..bfd24cb 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -44,10 +44,6 @@ #include <superio/fintek/common/fintek.h> #include <superio/fintek/f71869ad/f71869ad.h>
-/* FIXME: should not include .c files */ -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" - /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */ #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)
@@ -188,14 +184,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif /* CONFIG_HAVE_ACPI_RESUME */
- /* Initialize i8259 pic */ - post_code(0x43); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x44); - setup_i8254 (); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c index 16fb8ab..cf5c566 100644 --- a/src/mainboard/lippert/frontrunner-af/romstage.c +++ b/src/mainboard/lippert/frontrunner-af/romstage.c @@ -34,8 +34,6 @@ #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/early_serial.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" @@ -173,14 +171,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x43); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x44); - setup_i8254 (); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c index 93ff521..accf381 100644 --- a/src/mainboard/lippert/toucan-af/romstage.c +++ b/src/mainboard/lippert/toucan-af/romstage.c @@ -35,8 +35,6 @@ #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627dhg/w83627dhg.h> #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" @@ -174,14 +172,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif
- /* Initialize i8259 pic */ - post_code(0x43); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x44); - setup_i8254 (); - post_code(0x50); copy_and_run(); printk(BIOS_ERR, "Error: copy_and_run() returned!\n"); diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c index 0f5abdf..e7a1c4c 100644 --- a/src/mainboard/supermicro/h8scm/romstage.c +++ b/src/mainboard/supermicro/h8scm/romstage.c @@ -31,8 +31,6 @@ #include "northbridge/amd/agesa/family10/reset_test.h" #include <nb_cimx.h> #include <sb_cimx.h> -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" #include "superio/nuvoton/wpcm450/wpcm450.h" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627dhg/w83627dhg.h> @@ -122,14 +120,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x42);
- /* Initialize i8259 pic */ - post_code(0x41); - setup_i8259 (); - - /* Initialize i8254 timers */ - post_code(0x42); - setup_i8254 (); - post_code(0x50); print_debug("Disabling cache as ram "); disable_cache_as_ram(); diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c index fc239e4..f4befe6 100644 --- a/src/mainboard/tyan/s8226/romstage.c +++ b/src/mainboard/tyan/s8226/romstage.c @@ -33,8 +33,6 @@ #include <sb_cimx.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627dhg/w83627dhg.h> -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) @@ -133,8 +131,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("done\n");
post_code(0x51); - setup_i8259 (); - setup_i8254 (); copy_and_run();
/* We will not return, Should never see this message and post code. */ diff --git a/src/southbridge/amd/cimx/sb700/late.c b/src/southbridge/amd/cimx/sb700/late.c index 9605083..42330ca 100644 --- a/src/southbridge/amd/cimx/sb700/late.c +++ b/src/southbridge/amd/cimx/sb700/late.c @@ -24,6 +24,8 @@ #include <arch/ioapic.h> #include <device/smbus.h> /* smbus_bus_operations */ #include <pc80/mc146818rtc.h> +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <console/console.h> /* printk */ #include <device/pci_ehci.h> #include "lpc.h" /* lpc_read_resources */ @@ -87,6 +89,9 @@ static void lpc_init(device_t dev) */ rtc_init(0);
+ setup_i8259(); /* Initialize i8259 pic */ + setup_i8254(); /* Initialize i8254 timers */ + printk(BIOS_DEBUG, "SB700 - Late.c - lpc_init - End.\n"); }
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 219118a..40b422b 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -24,6 +24,8 @@ #include <arch/ioapic.h> #include <device/smbus.h> /* smbus_bus_operations */ #include <pc80/mc146818rtc.h> +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <console/console.h> /* printk */ #include <arch/acpi.h> #include <device/pci_ehci.h> @@ -136,6 +138,9 @@ static void lpc_init(device_t dev) */ rtc_init(0);
+ setup_i8259(); /* Initialize i8259 pic */ + setup_i8254(); /* Initialize i8254 timers */ + printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - End.\n"); }
diff --git a/src/southbridge/amd/cimx/sb900/late.c b/src/southbridge/amd/cimx/sb900/late.c index 3cd603c..7303bdc 100644 --- a/src/southbridge/amd/cimx/sb900/late.c +++ b/src/southbridge/amd/cimx/sb900/late.c @@ -23,6 +23,8 @@ #include <device/pci_ids.h> #include <device/smbus.h> /* smbus_bus_operations */ #include <pc80/mc146818rtc.h> +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <console/console.h> /* printk */ #include <device/pci_ehci.h> #include "lpc.h" /* lpc_read_resources */ @@ -109,6 +111,9 @@ static void lpc_init(device_t dev) */ rtc_init(0);
+ setup_i8259(); /* Initialize i8259 pic */ + setup_i8254(); /* Initialize i8254 timers */ + printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - End.\n"); }