Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39940 )
Change subject: mb/google/auron: Convert variants to use override devicetree ......................................................................
Patch Set 7:
(8 comments)
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... File src/mainboard/google/auron/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 15: # Enable Panel and configure power delays : register "gpu_panel_port_select" = "1" # eDP : register "gpu_panel_power_cycle_delay" = "5" # 400ms : register "gpu_panel_power_up_delay" = "400" # 40ms : register "gpu_panel_power_down_delay" = "150" # 15ms : register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms : register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
Only samus has vastly different values for this. […]
figured it was easier just to keep them grouped for each board, in case they need adjustment at a later time
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 3: # Enable eDP Hotplug with 6ms pulse : register "gpu_dp_d_hotplug" = "0x06" : : # Disable DisplayPort C Hotplug : register "gpu_dp_c_hotplug" = "0x00" : : # Enable HDMI Hotplug with 6ms pulse : register "gpu_dp_b_hotplug" = "0x06"
Well, only samus differs
only overriden for Samus since it has USB-C vs HDMI output
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 54: device pci 03.0 on end # mini-hd audio
Keep this one in here as well: […]
Ack
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... File src/mainboard/google/auron/variants/auron_paine/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 13: sata_port1_gen3_dtle
for another patch: port1 is not enabled in the port map...
it's not enable on any boards AFAIK, they all use port0
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... File src/mainboard/google/auron/variants/buddy/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 28:
Another missing thing! […]
Ack
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 34: device pci 1c.3 on end # PCIe Port #4 - WLAN (becomes RP2)
Oops, you lost a root port! […]
it's unused so no need to enable it
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... File src/mainboard/google/auron/variants/samus/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 4: register "gpu_dp_b_hotplug" = "0x06"
This rewrites the same value, is it intentional?
Done
https://review.coreboot.org/c/coreboot/+/39940/6/src/mainboard/google/auron/... PS6, Line 29: Disable S0ix
original comment said "for now", does it still apply?
for the past 5 years apparently