Attention is currently required from: Nico Huber, Furquan Shaikh, Patrick Rudolph, Tim Wawrzynczak, Angel Pons, Michael Niewöhner, Aaron Durbin. Bernardo Perez Priego has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37628 )
Change subject: soc/intel/common: Add romstage common stage file ......................................................................
Patch Set 21:
(2 comments)
Patchset:
PS21: Thanks for your feedback, please also refer to design document: https://review.coreboot.org/c/coreboot/+/51260
File src/soc/intel/common/basecode/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/37628/comment/c8ff328f_6ae829f9 PS20, Line 44: /* Save the DIMM information for SMBIOS table 17 */ : static void save_dimm_info(void) : { : int node, channel, dimm, dimm_max, index; : size_t hob_size; : uint8_t ddr_type; : const CONTROLLER_INFO *ctrlr_info; : const CHANNEL_INFO *channel_info; : const DIMM_INFO *src_dimm; : struct dimm_info *dest_dimm; : struct memory_info *mem_info; : const MEMORY_INFO_DATA_HOB *meminfo_hob; : const uint8_t smbios_memory_info_guid[16] = : FSP_SMBIOS_MEMORY_INFO_GUID; : const uint8_t *serial_num; : const char *dram_part_num = NULL; : size_t dram_part_num_len = 0; : bool is_dram_part_overridden = false; : : /* Locate the memory info HOB, presence validated by raminit */ : meminfo_hob = fsp_find_extension_hob_by_guid( : smbios_memory_info_guid, : &hob_size); : if (meminfo_hob == NULL || hob_size == 0) { : printk(BIOS_ERR, "SMBIOS MEMORY_INFO_DATA_HOB not found\n"); : return; : } : : /* : * Allocate CBMEM area for DIMM information used to populate SMBIOS : * table 17 : */ : mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info)); : if (mem_info == NULL) { : printk(BIOS_ERR, "CBMEM entry for DIMM info missing\n"); : return; : } : memset(mem_info, 0, sizeof(*mem_info)); : : /* Allow mainboard to override DRAM part number. */ : dram_part_num = mainboard_get_dram_part_num(); : if (dram_part_num) { : dram_part_num_len = strlen(dram_part_num); : is_dram_part_overridden = true; : } : : /* Save available DIMM information */ : index = 0; : dimm_max = ARRAY_SIZE(mem_info->dimm); : for (node = 0; node < MAX_NODE; node++) { : ctrlr_info = &meminfo_hob->Controller[node]; : for (channel = 0; channel < MAX_CH && index < dimm_max; : channel++) { : channel_info = &ctrlr_info->ChannelInfo[channel]; : if (channel_info->Status != CHANNEL_PRESENT) : continue; : : for (dimm = 0; dimm < MAX_DIMM && index < dimm_max; : dimm++) { : src_dimm = &channel_info->DimmInfo[dimm]; : dest_dimm = &mem_info->dimm[index]; : if (src_dimm->Status != DIMM_PRESENT) : continue; : : switch (meminfo_hob->MemoryType) { : case MRC_DDR_TYPE_DDR4: : ddr_type = MEMORY_TYPE_DDR4; : break; : case MRC_DDR_TYPE_DDR3: : ddr_type = MEMORY_TYPE_DDR3; : break; : case MRC_DDR_TYPE_LPDDR3: : ddr_type = MEMORY_TYPE_LPDDR3; : break; : default: : ddr_type = meminfo_hob->MemoryType; : break; : } : /* If there is no DRAM part number overridden by : * mainboard then use original one. */ : if (!is_dram_part_overridden) { : dram_part_num_len = sizeof(src_dimm->ModulePartNum); : dram_part_num = (const char *) : &src_dimm->ModulePartNum[0]; : } : : u8 memProfNum = meminfo_hob->MemoryProfile; : serial_num = src_dimm->SpdSave + : SPD_SAVE_OFFSET_SERIAL; : : /* Populate the DIMM information */ : dimm_info_fill(dest_dimm, : src_dimm->DimmCapacity, : ddr_type, : meminfo_hob->ConfiguredMemoryClockSpeed, : src_dimm->RankInDimm, : channel_info->ChannelId, : src_dimm->DimmId, : dram_part_num, : dram_part_num_len, : serial_num, : meminfo_hob->DataWidth, : meminfo_hob->VddVoltage[memProfNum], : meminfo_hob->EccSupport, : src_dimm->MfgId, : src_dimm->SpdModuleType); : index++; : } : } : } : mem_info->dimm_cnt = index; : printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt); : }
Thanks for the feedback I will address this in upcoming commits.
Please refer to this CR: https://review.coreboot.org/c/coreboot/+/51105