Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44355 )
Change subject: soc/intel/tigerlake: Allow fine grained control of S0iX states ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44355/1/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/44355/1/src/soc/intel/tigerlake/chi... PS1, Line 82: I would like this to default to 0xFF for any board that does not mention this setting in their devicetree.cb. Is that possible? If not, and if this struct is zero-filled by default, maybe I should instead call this LpmStateDisableMask, to make it into its bitwise negation, then a default of zero will result in all substates being enabled by default.