[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/common/acpi: Fix leakage power on Touchscreen during S5

[Roy Mingi Park (Code Review)]

Roy Mingi Park has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32360

Change subject: soc/intel/common/acpi: Fix leakage power on Touchscreen during S5
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soc/intel/common/acpi: Fix leakage power on Touchscreen during S5

Leakage power is observed from 3V_TSP_S0_FUSE during S5.
To avoid leakage power, GPP_E7 needs to be turned off before S5 entry

BUG=b:129899315
TEST= Measure leakage power in S5 from both Arcada and Sarien

Change-Id: Id63c992df929c1c4a3992905c9189cdacd8c6e42
Signed-off-by: Roy Mingi Park 
---
M src/soc/intel/common/acpi/platform.asl
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/32360/1

diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index bdc0d5c..3d725b6 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -34,6 +34,11 @@
 {
    Store (POST_OS_ENTER_PTS, DBG0)

+	if( Arg0 == 5)
+	{
+		_SB.PCI0.CTXS(GPP_E7)
+	}
+
 #if CONFIG(SOC_INTEL_COMMON_ACPI_EC_PTS_WAK)
    /* Call EC _PTS handler */
    _SB.PCI0.LPCB.EC0.PTS (Arg0)