Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39847 )
Change subject: soc/intel/tigerlake: Support to initialize Memory ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... File src/soc/intel/tigerlake/meminit_tgl.c:
https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... PS5, Line 22: #define MEM_INIT_CH_DQ_DQS_MAP(_mem_cfg, _b_cfg, _ch) \ : do { \ : memcpy(&_mem_cfg->DqMapCpu2DramCh ## _ch, \ : &_b_cfg->dq_map[_ch], \ : sizeof(_b_cfg->dq_map[_ch])); \ : memcpy(&_mem_cfg->DqsMapCpu2DramCh ## _ch, \ : &_b_cfg->dqs_map[_ch], \ : sizeof(_b_cfg->dqs_map[_ch])); \ : } while (0) Why is this a macro? Why can't it be a static function?
https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... PS5, Line 89: MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 0); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 1); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 2); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 3); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 4); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 5); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 6); : MEM_INIT_CH_DQ_DQS_MAP(mem_cfg, board_cfg, 7 Can this just be a loop?
https://review.coreboot.org/c/coreboot/+/39847/5/src/soc/intel/tigerlake/mem... PS5, Line 194: NUM_DIMM_SLOT i