[coreboot-gerrit] [XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC

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Attention is currently required from: Elyes Haouas, Felix Singer, Frans Hendriks, Jérémy Compostella, Paul Menzel, Shuo Liu, Vasiliy Khoruzhick.

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Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
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Patch Set 49:

(2 comments)

File src/soc/intel/snowridge/chip.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/b9f53e5e_e8c065df?usp... :
PS28, Line 418: 		    PCI_SLOT(dev->path.pci.devfn) >= PCI_SLOT(PCH_DEVFN_QAT_1_7) &&
> Can we have a checker, e.g. […]

Done

File src/soc/intel/snowridge/systemagent.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/ebe3a8d7_11917591?usp... :
PS15, Line 17: 	*size = CONFIG_ECAM_MMCONF_LENGTH;
> CONFIG_ECAM_MMCONF_LENGTH => should be aligned with the probed value

The PCIe MMCFG limit register holds a wrong value, so using the Kconfig value as a workaround.