Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... PS15, Line 75: if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { : if (!enable) { : printk(BIOS_DEBUG, "Disable FRB2 timer\n"); : ipmi_stop_bmc_wdt(BMC_KCS_BASE); : return; : } : }
so the strategy is to enable timer even if we are not sure it was meant to be enabled? Could you ple […]
It's according to the BIOS requirement, it says before MP, the default setting is enabled but no action needed, after MP the default is enabled and will reset system after timer expiration. In this change it can control enable/disable via VPD but action is always TIMEOUT_HARD_RESET when enabled, so the complete implementation should also make it configurable via VPD. Here default action set to TIMEOUT_HARD_RESET is meant for MP stage.