Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38869 )
Change subject: mb/bap/ode_e20XX: Switch away from ROMCC_BOOTBLOCK ......................................................................
mb/bap/ode_e20XX: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I37a1a95bdf07d99916247095a5bc3ac5349cd98f Reviewed-on: https://review.coreboot.org/c/coreboot/+/38869 Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/bap/ode_e20XX/Kconfig M src/mainboard/bap/ode_e20XX/Kconfig.name M src/mainboard/bap/ode_e20XX/Makefile.inc R src/mainboard/bap/ode_e20XX/bootblock.c 4 files changed, 7 insertions(+), 22 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve
diff --git a/src/mainboard/bap/ode_e20XX/Kconfig b/src/mainboard/bap/ode_e20XX/Kconfig index 2a72deb..4df74c0 100644 --- a/src/mainboard/bap/ode_e20XX/Kconfig +++ b/src/mainboard/bap/ode_e20XX/Kconfig @@ -14,14 +14,10 @@ # GNU General Public License for more details. #
-config BOARD_ODE_E20XX - def_bool n - if BOARD_ODE_E20XX
config BOARD_SPECIFIC_OPTIONS def_bool y - #select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select SOUTHBRIDGE_AMD_AGESA_YANGTZE diff --git a/src/mainboard/bap/ode_e20XX/Kconfig.name b/src/mainboard/bap/ode_e20XX/Kconfig.name index 54ddcac..a482846 100644 --- a/src/mainboard/bap/ode_e20XX/Kconfig.name +++ b/src/mainboard/bap/ode_e20XX/Kconfig.name @@ -1,2 +1,2 @@ -#config BOARD_ODE_E20XX -# bool"ODE_e20xx" +config BOARD_ODE_E20XX + bool "ODE_e20xx" diff --git a/src/mainboard/bap/ode_e20XX/Makefile.inc b/src/mainboard/bap/ode_e20XX/Makefile.inc index 4d8eb8d..8747d2f 100644 --- a/src/mainboard/bap/ode_e20XX/Makefile.inc +++ b/src/mainboard/bap/ode_e20XX/Makefile.inc @@ -14,6 +14,8 @@ # GNU General Public License for more details. #
+bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/bap/ode_e20XX/romstage.c b/src/mainboard/bap/ode_e20XX/bootblock.c similarity index 61% rename from src/mainboard/bap/ode_e20XX/romstage.c rename to src/mainboard/bap/ode_e20XX/bootblock.c index c1b96f12..8744547 100644 --- a/src/mainboard/bap/ode_e20XX/romstage.c +++ b/src/mainboard/bap/ode_e20XX/bootblock.c @@ -1,10 +1,6 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects - * (Written by Fabian Kunkel fabi@adv.bruhnspace.com for BAP) - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -15,26 +11,17 @@ * GNU General Public License for more details. */
-#include <arch/io.h> #include <amdblocks/acpimmio.h> -#include <device/pci_ops.h> -#include <southbridge/amd/agesa/hudson/hudson.h> - -#include <northbridge/amd/agesa/state_machine.h> +#include <bootblock_common.h> #include <superio/fintek/common/fintek.h> #include <superio/fintek/f81866d/f81866d.h>
- #define SERIAL_DEV1 PNP_DEV(0x4e, F81866D_SP1)
-void board_BeforeAgesa(struct sysinfo *cb) +void bootblock_mainboard_early_init(void) { /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ - pm_io_write(0xea, 1); - - /* Set LPC decode enables. */ - pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - pci_write_config32(dev, 0x44, 0xff03ffd5); + pm_write8(0xea, 0x1);
fintek_enable_serial(SERIAL_DEV1, CONFIG_TTYS0_BASE); }