[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd: Throttle SOC during low/no battery

[Tim Van Patten (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67189 )

Change subject: soc/amd: Throttle SOC during low/no battery
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Patch Set 9:

(2 comments)

File src/mainboard/google/skyrim/variants/skyrim/overridetree.cb:

https://review.coreboot.org/c/coreboot/+/67189/comment/f91d2a32_227859ba 
PS5, Line 234: 	# Normal
> No one is setting `dptc_enable`, so we don't have to worry about writing incorrect data.
> ...
> Having the different CLs will make it easier to bisect and blame any regressions.

As you point out, there's nothing to bisect here, so there's no benefit to breaking this CL apart.   There is no executable code, so there's nothing to regress aside from build errors which already give a line number.

Regardless, in the interest of trying to move these CLs forward I've split this into another CL.

File src/soc/amd/mendocino/chip.h:

https://review.coreboot.org/c/coreboot/+/67189/comment/f83cee9d_83ce9be4 
PS7, Line 68: vrm_current_limit_mA
> Do we need to pass these into FSP as well? […]

I've validated that these values are applied using `agt`.   Why would we need to pass these to FSP (what does adding these to `fsp_m_params.c` fix)?

@Felix - Any thoughts here?