Attention is currently required from: Martin Roth, Marshall Dawson, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48528 )
Change subject: soc/amd/cezanne: Add PSP integration for cezanne ......................................................................
Patch Set 28:
(3 comments)
File src/soc/amd/cezanne/fw.cfg:
https://review.coreboot.org/c/coreboot/+/48528/comment/a4e2735b_40be802f PS6, Line 11: #4? : PSPNVRAM_FILE PspNvramCZN_2.bin
I don't believe this should be an actual file. […]
Done
https://review.coreboot.org/c/coreboot/+/48528/comment/2316f393_0d57fa04 PS6, Line 28: PSP_MP2FW1_FILE TypeId0x125_MP2WALLE_CZN.sbin
I don't know what this is. I'm not seeing a FW name that looks like it in the Cezanne PI. […]
Done
https://review.coreboot.org/c/coreboot/+/48528/comment/66304a74_521f2c27 PS6, Line 54: PspNvramCZN_4.bin
This isn't correct. However we should be reserving space for the RPMC and not passing a file in.
Done. https://review.coreboot.org/c/coreboot/+/49015 This change is a new feature which allocates some space without a actua file.