[coreboot-gerrit] Change in coreboot[master]: mb/google/kohaku: Override tdp_pl1 and tdp_pl2 settings

[shkim (Code Review)]

Hello Seunghwan Kim,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/34398

to review the following change.

Change subject: mb/google/kohaku: Override tdp_pl1 and tdp_pl2 settings
......................................................................

mb/google/kohaku: Override tdp_pl1 and tdp_pl2 settings

This change overrides tdp_pl1 and tdp_pl2 settings for kohaku.

BUG=b:1704071
BRANCH=none
TEST=build

Change-Id: I3732173e06184cb55ddc5a383ba3b77aa8dc123f
Signed-off-by: Seunghwan Kim 
---
M src/mainboard/google/hatch/variants/kohaku/overridetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/34398/1

diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
index 18cc1d4..ba7c081 100644
--- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb
@@ -1,4 +1,7 @@
 chip soc/intel/cannonlake
+	register "tdp_pl1_override" = "8"
+	register "tdp_pl2_override" = "52"
+
    register "SerialIoDevMode" = "{
    	[PchSerialIoIndexI2C0] = PchSerialIoPci,
    	[PchSerialIoIndexI2C1] = PchSerialIoPci,