[coreboot-gerrit] [XS] Change in coreboot[main]: mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT...

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87163?usp=email )

Change subject: mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT LSX 2
......................................................................

mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT LSX 2

Change-Id: Id7cf723e354a98a760b9535309d1d9a8189d21ad
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87163
Reviewed-by: Matt DeVillier 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved

diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
index 7d15cb9..1e4899b 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
@@ -89,6 +89,7 @@
    PAD_CFG_GPO(GPP_F2, 1, RSMRST),					/* M.2 CNVi		[ Enabled  / Disabled ] */
    PAD_CFG_GPO(GPP_E19, 0, RSMRST),				/* TBT LSX #0		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_E21, 0, RSMRST),				/* TBT LSX #1           [ 1.8V     / 3.3V     ] */
+	PAD_CFG_GPO(GPP_D10, 0, RSMRST),				/* TBT LSX #2		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_D12, 0, RSMRST),				/* TBT LSX #3		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_F7, 0, RSMRST),					/* MCRO LDO		[ Disabled / Bypass   ] */
    PAD_CFG_GPO(GPD7, 0, RSMRST),					/* RTC Clock Delay	[ Disabled / 95ms     ] */
@@ -162,7 +163,6 @@
    PAD_NC(GPP_D7, NONE),
    PAD_NC(GPP_D8, NONE),
    PAD_NC(GPP_D9, NONE),
-	PAD_NC(GPP_D10, NONE),
    PAD_NC(GPP_D11, NONE),
    PAD_NC(GPP_D13, NONE),
    PAD_NC(GPP_D14, NONE),
diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
index bd22c92..2b0e710 100644
--- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
+++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
@@ -99,6 +99,7 @@
    PAD_CFG_GPO(GPP_H1, 0, RSMRST),					/* BFX Strap 2 Bit 3	[ Disabled / Enabled  ] */
    PAD_CFG_GPO(GPP_E19, 0, RSMRST),				/* TBT LSX #0		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_E21, 0, RSMRST),				/* TBT LSX #1           [ 1.8V     / 3.3V     ] */
+	PAD_CFG_GPO(GPP_D10, 0, RSMRST),				/* TBT LSX #2		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_D12, 0, RSMRST),				/* TBT LSX #3		[ 1.8V     / 3.3V     ] */
    PAD_CFG_GPO(GPP_F7, 0, RSMRST),					/* MCRO LDO		[ Disabled / Bypass   ] */
    PAD_CFG_GPO(GPD7, 0, RSMRST),					/* RTC Clock Delay	[ Disabled / 95ms     ] */
@@ -173,7 +174,6 @@
    PAD_NC(GPP_D7, NONE),
    PAD_NC(GPP_D8, NONE),
    PAD_NC(GPP_D9, NONE),
-	PAD_NC(GPP_D10, NONE),
    PAD_NC(GPP_D11, NONE),
    PAD_NC(GPP_D13, NONE),
    PAD_NC(GPP_D14, NONE),