Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45820 )
Change subject: cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instruction ......................................................................
cpu/qemu-x86/cache_as_ram_bootblock: Fix wrong instruction
The shld instruction does an arithmetic shift left on 64bit operants, but it's not the instruction we want, because what it actually does is shifting by cl, and storing the result in address 32.
This wasn't noticed with QEMU as the DRAM is up and address 32 is valid. On real hardware when CAR is running this instruction causes a crash.
Replace the instruction with the correct 64bit arithmetic left shift.
Change-Id: Iedad9f4b693b1ea05898456eac2050a9389f6f19 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45820 Reviewed-by: Christian Walter christian.walter@9elements.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/qemu-x86/cache_as_ram_bootblock.S 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved Christian Walter: Looks good to me, approved
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S index 148948b..197e0fd 100644 --- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S +++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S @@ -33,7 +33,7 @@ /* Restore the BIST result and timestamps. */ #if defined(__x86_64__) movd %mm2, %rdi - shld %rdi, 32 + shlq $32, %rdi movd %mm1, %rsi or %rsi, %rdi