Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56724 )
Change subject: mb/google/brya: Move WWAN PCIe config to brya0 ......................................................................
mb/google/brya: Move WWAN PCIe config to brya0
So far the PCIe WWAN configuration is specific to brya0, therefore move the configuration to the overridetree. While there, also add a new chip and device in order to add the ExternalFacingPort property to this same root port.
BUG=b:190408519
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: I53fa12dff25ba970b5d7d7be4bc1f8e52a0ed4ae --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb 3 files changed, 14 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/56724/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index d1b6f24..4c02495 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -9,6 +9,7 @@ select DRIVERS_INTEL_PMC select DRIVERS_INTEL_SOUNDWIRE select DRIVERS_INTEL_USB4_RETIMER + select DRIVERS_PCIE_EXTERNAL select DRIVERS_SOUNDWIRE_ALC5682 select DRIVERS_SOUNDWIRE_MAX98373 select DRIVERS_SPI_ACPI diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 12bff55..90b4f1c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -138,14 +138,6 @@ end device ref heci1 on end device ref sata on end - device ref pcie_rp6 on - # Enable WWAN PCIE 6 using clk 5 - register "pch_pcie_rp[PCH_RP(6)]" = "{ - .clk_src = 5, - .clk_req = 5, - .flags = PCIE_RP_LTR | PCIE_RP_AER, - }" - end #PCIE6 WWAN device ref pcie_rp8 on # Enable SD Card PCIE 8 using clk 3 register "pch_pcie_rp[PCH_RP(8)]" = "{ diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index d4653bc..11d6be9 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -162,7 +162,19 @@ end device ref pcie_rp6 on probe DB_LTE LTE_PCIE - end + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + + chip drivers/pcie/external + device generic 0 on + probe DB_LTE LTE_PCIE + end + end + end #PCIE6 WWAN device ref tcss_dma0 on chip drivers/intel/usb4/retimer register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"