[coreboot-gerrit] Change in ...coreboot[master]: arch/riscv: Fix arch timer timebase

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33797

Change subject: arch/riscv: Fix arch timer timebase
......................................................................

arch/riscv: Fix arch timer timebase

The arch timer uses a platform specific clock source.
Add a Kconfig that holds this clock frequency and use it to calculate
the time passed by.

Tested on qemu-system-riscv:
Fixes delays being ten times shorter as expected.

Change-Id: I2588149e2ee32130a2c41695c4c723b57d4fa827
Signed-off-by: Patrick Rudolph 
---
M src/arch/riscv/Kconfig
M src/arch/riscv/arch_timer.c
M src/soc/sifive/fu540/Kconfig
M src/soc/ucb/riscv/Kconfig
4 files changed, 22 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/33797/1

diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig
index 25a3980..6b12ff0 100644
--- a/src/arch/riscv/Kconfig
+++ b/src/arch/riscv/Kconfig
@@ -72,5 +72,9 @@
    bool
    default n

+config RISCV_ARCH_TIMER_FREQ
+	int
+	depends on RISCV_USE_ARCH_TIMER
+
 config RISCV_WORKING_HARTID
    int
diff --git a/src/arch/riscv/arch_timer.c b/src/arch/riscv/arch_timer.c
index 55b1f72..71b9771 100644
--- a/src/arch/riscv/arch_timer.c
+++ b/src/arch/riscv/arch_timer.c
@@ -20,9 +20,18 @@
 #include <timer.h>
 #include <mcall.h>

+/* mtime is clocked by platform specific clock source */
+static const uint32_t clocks_per_usec = CONFIG_RISCV_ARCH_TIMER_FREQ/1000000;
+
 void timer_monotonic_get(struct mono_time *mt)
 {
+	uint64_t raw;
+
    if (HLS()->time == NULL)
    	die("time not set in HLS");
-	mono_time_set_usecs(mt, (long)read64((void *)(HLS()->time)));
+	if (!clocks_per_usec)
+		die("Unsupported mtime clock frequency");
+
+	raw = read64((void *)(HLS()->time));
+	mono_time_set_usecs(mt, (long)(raw / clocks_per_usec));
 }
diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig
index 6ebde33..a10a146 100644
--- a/src/soc/sifive/fu540/Kconfig
+++ b/src/soc/sifive/fu540/Kconfig
@@ -49,4 +49,8 @@
    int
    default 0

+config RISCV_ARCH_TIMER_FREQ
+	int
+	default 1000000
+
 endif
diff --git a/src/soc/ucb/riscv/Kconfig b/src/soc/ucb/riscv/Kconfig
index ad48c1c..49887a4 100644
--- a/src/soc/ucb/riscv/Kconfig
+++ b/src/soc/ucb/riscv/Kconfig
@@ -14,6 +14,10 @@

if SOC_UCB_RISCV

+config RISCV_ARCH_TIMER_FREQ
+	int
+	default 10000000
+
 if ARCH_RISCV_RV64

config RISCV_ARCH