[coreboot-gerrit] Change in coreboot[master]: device: Add a disabling PCIe device bus master function

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41042 )

Change subject: device: Add a disabling PCIe device bus master function
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device: Add a disabling PCIe device bus master function

A function pci_dev_disable_bus_master() is created. This function
can be used to disable Thunderbolt PCIe root ports, bridges and
devices for Vt-d based security platform at end of boot service.

BUG=None
TEST=Verified PCIe device bus master enable bit is cleared.

Signed-off-by: John Zhao 
Change-Id: Ie92a15bf2c66fdc311098acb81019d4fb7f68313
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41042
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/device/pci_device.c
M src/include/device/pci.h
2 files changed, 6 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index f83520e..032e15c 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1643,4 +1643,9 @@
 #endif
    }
 }
+
+void pci_dev_disable_bus_master(const struct device *dev)
+{
+	pci_update_config16(dev, PCI_COMMAND, ~PCI_COMMAND_MASTER, 0x0);
+}
 #endif
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index f091105..4529074 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -127,6 +127,7 @@
    return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
 }

+void pci_dev_disable_bus_master(const struct device *dev);
 #endif /* CONFIG_PCI */

void pci_early_bridge_init(void);