[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47182 )

Change subject: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log
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Patch Set 6: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/47182/6/src/soc/intel/tigerlake/elo... 
File src/soc/intel/tigerlake/elog.c:

https://review.coreboot.org/c/coreboot/+/47182/6/src/soc/intel/tigerlake/elo... 
PS6, Line 13: #define PCIE_ROOT_PORT_STATUS		0x60
Not required anymore.