[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/tigerlake: Add SPI DMI Destination ID

[Furquan Shaikh (Code Review)]

Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47989 )

Change subject: src/soc/intel/tigerlake: Add SPI DMI Destination ID
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src/soc/intel/tigerlake: Add SPI DMI Destination ID

This change adds the SPI-DMI Destination ID for tigerlake
soc. This is needed for enabling support for extended
BIOS region. Also, implements a SOC helper function
soc_get_spi_dmi_destination_id() which returns SPI-DMI
Destination id.

BUG=b:171534504

Signed-off-by: Srinidhi N Kaushik 
Change-Id: I0b6a8af0c1e79fa668ef2f84b93f3bbece59eb6a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47989
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/tigerlake/include/soc/pcr_ids.h
M src/soc/intel/tigerlake/spi.c
2 files changed, 12 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/tigerlake/include/soc/pcr_ids.h b/src/soc/intel/tigerlake/include/soc/pcr_ids.h
index 7388593..319558a 100644
--- a/src/soc/intel/tigerlake/include/soc/pcr_ids.h
+++ b/src/soc/intel/tigerlake/include/soc/pcr_ids.h
@@ -31,4 +31,9 @@
 #define PID_ESPI	0xc7
 #define PID_SERIALIO	0xcb

+/*
+ * SPI - DMI Destination ID
+ */
+#define SPI_DMI_DESTINATION_ID	0x23a8
+
 #endif
diff --git a/src/soc/intel/tigerlake/spi.c b/src/soc/intel/tigerlake/spi.c
index 63d9d80..ef86fea 100644
--- a/src/soc/intel/tigerlake/spi.c
+++ b/src/soc/intel/tigerlake/spi.c
@@ -7,7 +7,9 @@
  */

#include <intelblocks/spi.h>
+#include <intelblocks/fast_spi.h>
 #include <soc/pci_devs.h>
+#include <soc/pcr_ids.h>

int spi_soc_devfn_to_bus(unsigned int devfn)
 {
@@ -23,3 +25,8 @@
    }
    return -1;
 }
+
+uint32_t soc_get_spi_dmi_destination_id(void)
+{
+	return SPI_DMI_DESTINATION_ID;
+}