Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39891 )
Change subject: mb/*/*{i440BX}: Move serial init to bootblock ......................................................................
mb/*/*{i440BX}: Move serial init to bootblock
This moves the serial init to the bootblock.
Since those boards generally don't have a large flash the console is disabled by default, but when optionally enabled the bootblock size needs to be increased.
Change-Id: Icf062c93d9bd7f7a77e3d343ac8aadab038db296 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/slot_1/Kconfig A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/bootblock.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/bootblock.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/bootblock.c A src/mainboard/asus/p3b-f/Makefile.inc C src/mainboard/asus/p3b-f/bootblock.c M src/mainboard/asus/p3b-f/romstage.c M src/northbridge/intel/i440bx/Kconfig M src/northbridge/intel/i440bx/raminit.h M src/northbridge/intel/i440bx/romstage.c 13 files changed, 22 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/39891/1
diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index a8d90e8..1af9214 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -43,6 +43,7 @@
config C_ENV_BOOTBLOCK_SIZE hex + default 0x4000 if BOOTBLOCK_CONSOLE default 0x2000
endif diff --git a/src/mainboard/asus/p2b-ds/Makefile.inc b/src/mainboard/asus/p2b-ds/Makefile.inc new file mode 100644 index 0000000..8501868 --- /dev/null +++ b/src/mainboard/asus/p2b-ds/Makefile.inc @@ -0,0 +1 @@ +bootblock-y += bootblock.c diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/bootblock.c similarity index 90% rename from src/mainboard/asus/p2b-ds/romstage.c rename to src/mainboard/asus/p2b-ds/bootblock.c index 67ba632..c30de04 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/bootblock.c @@ -13,13 +13,13 @@ * GNU General Public License for more details. */
-#include <northbridge/intel/i440bx/raminit.h> +#include <bootblock_common.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-void mainboard_enable_serial(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/asus/p2b-ls/Makefile.inc b/src/mainboard/asus/p2b-ls/Makefile.inc new file mode 100644 index 0000000..8501868 --- /dev/null +++ b/src/mainboard/asus/p2b-ls/Makefile.inc @@ -0,0 +1 @@ +bootblock-y += bootblock.c diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/bootblock.c similarity index 90% rename from src/mainboard/asus/p2b-ls/romstage.c rename to src/mainboard/asus/p2b-ls/bootblock.c index 546d9ed..704dc2e 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/bootblock.c @@ -13,14 +13,14 @@ * GNU General Public License for more details. */
-#include <northbridge/intel/i440bx/raminit.h> +#include <bootblock_common.h> #include <superio/winbond/common/winbond.h> /* FIXME: The ASUS P2B-LS has a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-void mainboard_enable_serial(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/asus/p2b/Makefile.inc b/src/mainboard/asus/p2b/Makefile.inc new file mode 100644 index 0000000..8501868 --- /dev/null +++ b/src/mainboard/asus/p2b/Makefile.inc @@ -0,0 +1 @@ +bootblock-y += bootblock.c diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/bootblock.c similarity index 90% rename from src/mainboard/asus/p2b/romstage.c rename to src/mainboard/asus/p2b/bootblock.c index 67ba632..c30de04 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/bootblock.c @@ -13,13 +13,13 @@ * GNU General Public License for more details. */
-#include <northbridge/intel/i440bx/raminit.h> +#include <bootblock_common.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83977tf/w83977tf.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-void mainboard_enable_serial(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/asus/p3b-f/Makefile.inc b/src/mainboard/asus/p3b-f/Makefile.inc new file mode 100644 index 0000000..8501868 --- /dev/null +++ b/src/mainboard/asus/p3b-f/Makefile.inc @@ -0,0 +1 @@ +bootblock-y += bootblock.c diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p3b-f/bootblock.c similarity index 78% copy from src/mainboard/asus/p2b-ds/romstage.c copy to src/mainboard/asus/p3b-f/bootblock.c index 67ba632..6f60077 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p3b-f/bootblock.c @@ -1,7 +1,6 @@ /* * This file is part of the coreboot project. * - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -13,13 +12,17 @@ * GNU General Public License for more details. */
-#include <northbridge/intel/i440bx/raminit.h> + +#include <bootblock_common.h> #include <superio/winbond/common/winbond.h> +/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #include <superio/winbond/w83977tf/w83977tf.h>
+/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-void mainboard_enable_serial(void) + +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index e3a7897..5adb703 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -16,12 +16,6 @@ #include <arch/io.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> -#include <superio/winbond/common/winbond.h> -/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ -#include <superio/winbond/w83977tf/w83977tf.h> - -/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ -#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
/* * ASUS P3B-F specific SPD enable magic. @@ -53,8 +47,3 @@ { outb(0x67, PM_IO_BASE + 0x37); } - -void mainboard_enable_serial(void) -{ - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index 0161eb3..7fdf0a9 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -16,7 +16,11 @@ bool select NO_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP - select NO_BOOTBLOCK_CONSOLE + +#these boards don't have a lot of flash so change the default +config BOOTBLOCK_CONSOLE + bool + default n
config SDRAMPWR_4DIMM bool diff --git a/src/northbridge/intel/i440bx/raminit.h b/src/northbridge/intel/i440bx/raminit.h index dcc8007..981d473 100644 --- a/src/northbridge/intel/i440bx/raminit.h +++ b/src/northbridge/intel/i440bx/raminit.h @@ -22,7 +22,6 @@ void enable_spd(void); void disable_spd(void); void sdram_initialize(void); -void mainboard_enable_serial(void);
/* Debug */ #if CONFIG(DEBUG_RAM_SETUP) diff --git a/src/northbridge/intel/i440bx/romstage.c b/src/northbridge/intel/i440bx/romstage.c index 1dee03a..8109c37 100644 --- a/src/northbridge/intel/i440bx/romstage.c +++ b/src/northbridge/intel/i440bx/romstage.c @@ -20,9 +20,6 @@
void mainboard_romstage_entry(void) { - mainboard_enable_serial(); - console_init(); - i82371eb_early_init();
sdram_initialize();