build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39823 )
Change subject: soc/intel/jasperlake: Add Jasper Lake SoC support
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39823/1/src/soc/intel/jasperlake/in...
File src/soc/intel/jasperlake/include/soc/romstage.h:
https://review.coreboot.org/c/coreboot/+/39823/1/src/soc/intel/jasperlake/in...
PS1, Line 20: void mainboard_memory_init_params(FSPM_UPD *mupd);
need consistent spacing around '*' (ctx:WxV)
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I9c33f478a2f8ed5e2d8e7815821d13044d35d388
Gerrit-Change-Number: 39823
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Gerrit-Owner: Aamir Bohra
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Gerrit-Reviewer: Martin Roth
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Gerrit-Reviewer: Patrick Georgi
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Gerrit-Reviewer: Patrick Rudolph
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Gerrit-Comment-Date: Wed, 25 Mar 2020 12:30:42 +0000
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