[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Use common cpu/intel/car/romstage.c code

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35109 )

Change subject: soc/intel/cannonlake: Use common cpu/intel/car/romstage.c code
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Patch Set 2: Code-Review+2
> Patch Set 2:
>
> Ahh crap, there is a weak .car_stage_entry definition. Same fix for apoololake, icelake and denverton_ns.

Subrata - are you planning on pushing changes for the rest of the affected platforms as well? It might make sense to push it as a single CL.