coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: Revert "acpi,Makefile: Add preload_acpi_dsdt"
by Maximilian Brune (Code Review) 01 Apr '25

01 Apr '25

Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/87065?usp=email ) Change subject: Revert "acpi,Makefile: Add preload_acpi_dsdt" ...................................................................... Revert "acpi,Makefile: Add preload_acpi_dsdt" This reverts commit 6b446b991b00c44902b70d86c75b23a8f93d510b. Reason for revert: This effort was apparently given up on since 4 years. So remove the function, since it is not used at the moment. If someone wants to bring that effort back to live, said person can feel free to do so. Change-Id: Ifa1ca58c8bf6aabb5b291d3244b1a1a0a7aec6c7 Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> --- M Makefile.mk M src/acpi/acpi.c M src/include/acpi/acpi.h 3 files changed, 0 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/87065/1 diff --git a/Makefile.mk b/Makefile.mk index bc547de..c6d79f5 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -306,9 +306,6 @@ $(CONFIG_CBFS_PREFIX)/$(1).aml-file = $(obj)/$(1).aml $(CONFIG_CBFS_PREFIX)/$(1).aml-type = raw $(CONFIG_CBFS_PREFIX)/$(1).aml-compression = none -ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y) -$(CONFIG_CBFS_PREFIX)/$(1).aml-align = 64 -endif cbfs-files-$(if $(2),$(2),y) += $(CONFIG_CBFS_PREFIX)/$(1).aml $(eval DEPENDENCIES += $(obj)/$(1).d) $(obj)/$(1).aml: $(src)/mainboard/$(MAINBOARDDIR)/$(1).asl $(obj)/config.h diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 0687954..6c463c9 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1349,17 +1349,6 @@ return 0; } -void preload_acpi_dsdt(void) -{ - const char *file = CONFIG_CBFS_PREFIX "/dsdt.aml"; - - if (!CONFIG(CBFS_PRELOAD)) - return; - - printk(BIOS_DEBUG, "Preloading %s\n", file); - cbfs_preload(file); -} - static void acpi_create_dsdt(acpi_header_t *header, void *dsdt_file_arg) { dsdt = header; diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 604c60d..3b0aa62 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -1739,7 +1739,6 @@ unsigned long fw_cfg_acpi_tables(unsigned long start); /* These are implemented by the target port or north/southbridge. */ -void preload_acpi_dsdt(void); unsigned long write_acpi_tables(const unsigned long addr); unsigned long acpi_fill_madt(unsigned long current); unsigned long acpi_arch_fill_madt(acpi_madt_t *madt, unsigned long current); -- To view, visit https://review.coreboot.org/c/coreboot/+/87065?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifa1ca58c8bf6aabb5b291d3244b1a1a0a7aec6c7 Gerrit-Change-Number: 87065 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com>

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[XS] Change in coreboot[main]: mb/google/brya/var/gimble: Enable RTD3 for SSD to resolve S0ix issue
by Pranava Y N (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87061?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Eric Lai, Code-Review+2 by Subrata Banik Change subject: mb/google/brya/var/gimble: Enable RTD3 for SSD to resolve S0ix issue ...................................................................... mb/google/brya/var/gimble: Enable RTD3 for SSD to resolve S0ix issue Some SSDs block the CPU from reaching C10 during the S0ix suspend without the RTD3 configuration. Add PCIe RTD3 support so NVMe gets placed into D3 state when entering S0ix. Enable and reset GPIOs are configured as per pin mapping in gpio.c. BUG=b:391612392 TEST=Run suspend_stress_test on gimble device and verify that the device suspends to S0ix. Change-Id: Iac9eb63639cbb0c7708d5b2bb30aca20e09db3e7 Signed-off-by: Pranava Y N <pranavayn(a)google.com> --- M src/mainboard/google/brya/variants/gimble/overridetree.cb 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/87061/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87061?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac9eb63639cbb0c7708d5b2bb30aca20e09db3e7 Gerrit-Change-Number: 87061 Gerrit-PatchSet: 2 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[L] Change in coreboot[main]: mb/*/*/*.fmd: Start flash at 0
by Matt DeVillier (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Alexander Couzens, Angel Pons, Arthur Heymans, Christian Walter, Erik van den Bogaert, Felix Held, Fred Reitberger, Hung-Te Lin, Jason Glenesk, Jason Nien, Jérémy Compostella, Marshall Dawson, Martin L Roth, Martin Roth, Matt DeVillier, Maximilian Brune, Michał Żygowski, Nick Vaccaro, Nico Huber, Patrick Rudolph, Philipp Hug, Piotr Król, Raul Rangel, Shuo Liu, Subrata Banik, Tim Wawrzynczak, Werner Zeh, Yidi Lin, ron minnich, yuchi.chen(a)intel.com. Matt DeVillier has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63771?usp=email ) Change subject: mb/*/*/*.fmd: Start flash at 0 ...................................................................... Patch Set 23: Code-Review+1 (2 comments) Patchset: PS23: patch set 23 tested ok on MDN, CZN, PCO Commit Message: https://review.coreboot.org/c/coreboot/+/63771/comment/062f5e9d_29a4e773?us… : PS19, Line 22: tested: boot glinda based mainboard and also check that memory training : is still cached successfully in APOB_NV. > I'm also seeing errors building using the default/generated flashmap on Intel devices resolved in patchset 23 -- To view, visit https://review.coreboot.org/c/coreboot/+/63771?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Gerrit-Change-Number: 63771 Gerrit-PatchSet: 23 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 15:21:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Show the option to enable the GNA
by Matt DeVillier (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87055?usp=email ) Change subject: mb/starlabs/starbook/mtl: Show the option to enable the GNA ...................................................................... Patch Set 2: (1 comment) File src/mainboard/starlabs/starbook/cfr.c: https://review.coreboot.org/c/coreboot/+/87055/comment/f211d0ba_e32257bf?us… : PS1, Line 259: #if CONFIG(SOC_INTEL_TIGERLAKE) || CONFIG(SOC_INTEL_ALDERLAKE) || CONFIG(SOC_INTEL_RAPTORLAKE) > needs `| MTL` here too or variable is unused Done -- To view, visit https://review.coreboot.org/c/coreboot/+/87055?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I568cb169f5266703e4422d77c0e0546a6d245ee2 Gerrit-Change-Number: 87055 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Apr 2025 15:16:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/brya/var/mithrax: Enable RTD3 for SSD to resolve S0ix issue
by Eric Lai (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N. Eric Lai has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/87060?usp=email ) Change subject: mb/google/brya/var/mithrax: Enable RTD3 for SSD to resolve S0ix issue ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87060?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5008ec5e153c3695b1d6aa1183515eba192deaa2 Gerrit-Change-Number: 87060 Gerrit-PatchSet: 3 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 14:55:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/brya/var/gimble: Enable RTD3 for SSD to resolve S0ix issue
by Eric Lai (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N. Eric Lai has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/87061?usp=email ) Change subject: mb/google/brya/var/gimble: Enable RTD3 for SSD to resolve S0ix issue ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87061?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac9eb63639cbb0c7708d5b2bb30aca20e09db3e7 Gerrit-Change-Number: 87061 Gerrit-PatchSet: 1 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 14:55:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Revert "mb/google/brya: Enable RTD3 for SSD to resolve S0ix issue"
by Eric Lai (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N. Eric Lai has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/87056?usp=email ) Change subject: Revert "mb/google/brya: Enable RTD3 for SSD to resolve S0ix issue" ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87056?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I72270812312db5b2505046f32466cbb4c200947f Gerrit-Change-Number: 87056 Gerrit-PatchSet: 3 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 01 Apr 2025 14:55:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Show the option to enable the GNA
by Sean Rhodes (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87055?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Matt DeVillier Change subject: mb/starlabs/starbook/mtl: Show the option to enable the GNA ...................................................................... mb/starlabs/starbook/mtl: Show the option to enable the GNA Change-Id: I568cb169f5266703e4422d77c0e0546a6d245ee2 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starbook/cfr.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/87055/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87055?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I568cb169f5266703e4422d77c0e0546a6d245ee2 Gerrit-Change-Number: 87055 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/adl: Fill in SPD data on both channels of DDR5 memory
by Tim Crawford (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Angel Pons, Dinesh Gehlot, Jeremy Soller, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tarun Tuli. Hello Dinesh Gehlot, Jeremy Soller, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tarun Tuli, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75284?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/adl: Fill in SPD data on both channels of DDR5 memory ...................................................................... soc/intel/adl: Fill in SPD data on both channels of DDR5 memory CB:52731 introduced support for reading SPD from the EEPROM via SMBus. Replace the now unneeded workaround for DDR5 with filling in the correct channels for DDR5. Change-Id: I5a92199a7cd2718e9396f0dac8257df40e4f834c Signed-off-by: Jeremy Soller <jeremy(a)system76.com> Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/soc/intel/alderlake/meminit.c 1 file changed, 15 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/75284/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/75284?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5a92199a7cd2718e9396f0dac8257df40e4f834c Gerrit-Change-Number: 75284 Gerrit-PatchSet: 7 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Show the option to enable the GNA
by Matt DeVillier (Code Review) 01 Apr '25

01 Apr '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87055?usp=email ) Change subject: mb/starlabs/starbook/mtl: Show the option to enable the GNA ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/mainboard/starlabs/starbook/cfr.c: https://review.coreboot.org/c/coreboot/+/87055/comment/2d933bb1_1cd859ae?us… : PS1, Line 259: #if CONFIG(SOC_INTEL_TIGERLAKE) || CONFIG(SOC_INTEL_ALDERLAKE) || CONFIG(SOC_INTEL_RAPTORLAKE) needs `| MTL` here too or variable is unused -- To view, visit https://review.coreboot.org/c/coreboot/+/87055?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I568cb169f5266703e4422d77c0e0546a6d245ee2 Gerrit-Change-Number: 87055 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 01 Apr 2025 14:30:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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