coreboot-gerrit January 2025

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[M] Change in coreboot[main]: docs/getting-started: Update guide for writing docs
by Nicholas Chin (Code Review) 06 Jan '25

06 Jan '25

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85857?usp=email to look at the new patch set (#3). Change subject: docs/getting-started: Update guide for writing docs ...................................................................... docs/getting-started: Update guide for writing docs - Update the instructions for building the documentation to account for the switch from Recommonmark to MyST Parser - Update outdated URLs - Update various details to account for the current behavior and features resulting from previous changes Change-Id: I569862e30fb88a421ad2338aafabeaf3ea76836a Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M Documentation/getting_started/writing_documentation.md 1 file changed, 32 insertions(+), 40 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/85857/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85857?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I569862e30fb88a421ad2338aafabeaf3ea76836a Gerrit-Change-Number: 85857 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: util/cbfstool/cbfs-payload-linux.c: Remove TODO
by Maximilian Brune (Code Review) 06 Jan '25

06 Jan '25

Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/83618?usp=email ) Change subject: util/cbfstool/cbfs-payload-linux.c: Remove TODO ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/83618?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41298b509b3f5e775bb4000c82c539eefa80c885 Gerrit-Change-Number: 83618 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 06 Jan 2025 14:13:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add srclken_rc drivers
by Jarried Lin (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85842?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add srclken_rc drivers ...................................................................... soc/mediatek/mt8196: Add srclken_rc drivers MT8196 use new RC mode with clk_buf driver, and need srclken_rc to send PMRC_EN. PMRC_EN will collect the requirements of all users, such as, MD, GPS, PCIE, NFC, and so on. TEST=Build pass. BUG=b:317009620 Signed-off-by: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Change-Id: I40f8d2b12027955e6bd57b666e9f04c0116a0a93 --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/srclken_rc.h A src/soc/mediatek/mt8196/srclken_rc.c 4 files changed, 783 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/85842/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85842?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40f8d2b12027955e6bd57b666e9f04c0116a0a93 Gerrit-Change-Number: 85842 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add clk_buf drivers
by Jarried Lin (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85841?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add clk_buf drivers ...................................................................... soc/mediatek/mt8196: Add clk_buf drivers MT8196 use MT6685 clk_buf, and will use new RC mode with srclken_rc. The clk_buf will provide several 26M clocks, and these clocks can be independently turned on. RC mode will determine which clocks to be turned on based on users' requests, which is collected into PMRC_EN register by srclken_rc. TEST=Build pass. BUG=b:317009620 Signed-off-by: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Change-Id: Ie18bfbb2f3354ba3645799857061dc20de7f6d84 --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/clkbuf_ctl.c A src/soc/mediatek/mt8196/include/soc/clkbuf_ctl.h 3 files changed, 938 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/85841/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85841?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie18bfbb2f3354ba3645799857061dc20de7f6d84 Gerrit-Change-Number: 85841 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Delay 0.5ms after enabling pmif_spmi_enable_swinf
by Hope Wang (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hope Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85799?usp=email ) Change subject: soc/mediatek/mt8196: Delay 0.5ms after enabling pmif_spmi_enable_swinf ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85799/comment/f5ab1edd_185fc5a6?us… : PS2, Line 7: Add delay in pmif_spmi.c > Thanks for the explanation. In that case, please change the commit subject to "Delay 0. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Gerrit-Change-Number: 85799 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Mon, 06 Jan 2025 13:24:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Delay 0.5ms after enabling pmif_spmi_enable_swinf
by Jarried Lin (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85799?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Delay 0.5ms after enabling pmif_spmi_enable_swinf ...................................................................... soc/mediatek/mt8196: Delay 0.5ms after enabling pmif_spmi_enable_swinf The initialization process of SPMI requires a certain amount of time (0.5ms) to ensure all components are correctly configured and synchronized. Otherwise, if the SPMI calibration fails, it will result in the non-serial firmware failing to boot. TEST=Build pass, non-serial firmware boot ok. BUG=b:341054056 Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/pmif_spmi.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/85799/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Gerrit-Change-Number: 85799 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix MT6363 buck5 enablement
by Hope Wang (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hope Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85838?usp=email ) Change subject: soc/mediatek/mt8196: Fix MT6363 buck5 enablement ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85838/comment/12926633_be1794f4?us… : PS1, Line 7: Correct MT6363 buck5 enable API > `Fix MT6363 buck5 enablement` (because the API (interface) isn't wrong) Done https://review.coreboot.org/c/coreboot/+/85838/comment/c2279a49_8b2db154?us… : PS1, Line 9: MT6363 buck5 is not used in rauru/navi. Fixed the incorrect mask and : offset in the enable API. > Modify a few words: […] Done https://review.coreboot.org/c/coreboot/+/85838/comment/91db6fae_5cdff4a1?us… : PS1, Line 12: build pass > Please elaborate how you verify this patch. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Gerrit-Change-Number: 85838 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 06 Jan 2025 13:22:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix MT6363 buck5 enablement
by Jarried Lin (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85838?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Fix MT6363 buck5 enablement ...................................................................... soc/mediatek/mt8196: Fix MT6363 buck5 enablement The MT6363 buck5 API's mask and shift settings are incorrect, preventing the buck from being disabled. Resolve the issue by correcting these two values. BUG=b:365445188 TEST=build pass, check buck5 is power off after calling the mt6363_enable_buck5 API. Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/mt6363.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/85838/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Gerrit-Change-Number: 85838 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XL] Change in coreboot[main]: DO NOT SUBMIT - treewide: indent Makefile conditionals
by Maximilian Brune (Code Review) 06 Jan '25

06 Jan '25

Maximilian Brune has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79230?usp=email ) Change subject: DO NOT SUBMIT - treewide: indent Makefile conditionals ...................................................................... Abandoned technically not my change anymore, but I feel this is abandoned, so I mark it as such. If someone wants to continue the work, he or she should feel free to create a new patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/79230?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iceaa0d7d9db3e3ede5b7cfba1a1e13388647f33e Gerrit-Change-Number: 79230 Gerrit-PatchSet: 2 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <patrick(a)coreboot.org>

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[S] Change in coreboot[main]: arch/riscv: Add common FDT build
by Maximilian Brune (Code Review) 06 Jan '25

06 Jan '25

Attention is currently required from: Alicja Michalska, Maximilian Brune, Philipp Hug, ron minnich. Hello Alicja Michalska, Philipp Hug, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83848?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Alicja Michalska, Verified+1 by build bot (Jenkins) Change subject: arch/riscv: Add common FDT build ...................................................................... arch/riscv: Add common FDT build Currently all platforms on RISC-V require a FDT. The inclusion of the FDT is currently done in the platform Makefiles. In order to factor out some common code this patch adds the inclusion in the architecture Makefile. The FDT must be aligned to 8 byte according to device tree spec. It avoids misaligned access. Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I3b304a89646fe84c98e9f199f315bebb156de16c --- M src/arch/riscv/Kconfig M src/arch/riscv/Makefile.mk 2 files changed, 38 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/83848/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/83848?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b304a89646fe84c98e9f199f315bebb156de16c Gerrit-Change-Number: 83848 Gerrit-PatchSet: 4 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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