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Change subject: make same cpu pyhsical address
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84230/comment/296f6b7f_f3557c68?us… :
PS2, Line 7: make same cpu pyhsical address
:
: 2 funtions are used to get cpu physical address like below.
: cpu_phys_address_size
: soc_phys_address_size
: And If CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH is defined,
: it can return different address size like below
: example)
: coreboot log: CPU physical address size: 46 bits
: OS log : DMAR: Host address width 42
: So, need to make one API to use same physical address.
:
> Yes, the return value is overrided by CONFIG_SOC_PHYSICAL_ADDRESS_WIDT only in soc_phys_address_size […]
This change still supports overriding address width like current implementation.
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Change subject: tree: Use boolean for lpss_s0ix_enable
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Patch Set 2: Code-Review+1
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Change subject: mb/google/brox/variants/brox:remove PL4 value modification
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Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83662/comment/8208f60c_8882bee1?us… :
PS3, Line 7: mb/google/brox/variants/brox:remove PL4 value modification
Please add a space after the colon (:).
https://review.coreboot.org/c/coreboot/+/83662/comment/9e0a11d2_8f87c169?us… :
PS3, Line 9: Remove PL4 value modification based on PsysPL3 value.
Why?
https://review.coreboot.org/c/coreboot/+/83662/comment/d25dafd6_d36f10df?us… :
PS3, Line 13: TEST=Built and boot on brox system
What difference can be seen?
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Change subject: make same cpu pyhsical address
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84230/comment/ce0339f0_64d6309e?us… :
PS2, Line 7: make same cpu pyhsical address
:
: 2 funtions are used to get cpu physical address like below.
: cpu_phys_address_size
: soc_phys_address_size
: And If CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH is defined,
: it can return different address size like below
: example)
: coreboot log: CPU physical address size: 46 bits
: OS log : DMAR: Host address width 42
: So, need to make one API to use same physical address.
:
> you really need to write a better commit msg to understand the problem. […]
Yes, the return value is overrided by CONFIG_SOC_PHYSICAL_ADDRESS_WIDT only in soc_phys_address_size function. So, if CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH is defined, cpu_phys_address_size and soc_phys_address_size return different values and different address widthes are used in code.
This change making same value even after overriding
If we want to completely override phys_address_size then we make differently.
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Hello Anil Kumar K, Bora Guvendik, Cliff Huang, Jamie Ryu, Jérémy Compostella, Lance Zhao, Subrata Banik, Tim Wawrzynczak, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84230?usp=email
to look at the new patch set (#3).
Change subject: make same cpu pyhsical address
......................................................................
make same cpu pyhsical address
2 funtions are used to get cpu physical address.
cpu_phys_address_size
soc_phys_address_size
soc_phys_address_size is intended to override width
but issue is only some part of code is applied
with overriden value.
example)
Define CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH as 42
coreboot log: CPU physical address size: 46 bits
OS log : DMAR: Host address width 42
This change make same value even if after overriding address width.
BUG: none
TEST: Check same address size in coreboot log and OS log
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
Change-Id: I06c485511fa7f72a445c8aed56d8a470b4772092
---
M src/acpi/acpi_dmar.c
M src/arch/x86/cpu_common.c
M src/device/pci_device.c
M src/include/cpu/cpu.h
M src/soc/intel/common/block/systemagent/systemagent.c
5 files changed, 6 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/84230/3
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Change subject: cpu/x86/smm: Save and restore UART 8250 state on all platforms
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
This seems like a good plan if we're going to re-initialize the UART. The other option would be to just use whatever it's been set to, assuming that the remote terminal is set to the new settings and that updating the UART will mess up what's being received.
Maybe set up a Kconfig for whether to re-init in SMM?
Obviously this needs to be rebased as well.
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Change subject: tree: Use boolean for lpss_s0ix_enable
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Patch Set 2: Code-Review+2
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Change subject: mb/google/hatch: Add FP enable for Dratini
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Patch Set 7: Code-Review+2
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