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Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................
Patch Set 82:
(2 comments)
Patchset:
PS82:
> > Please also confirm the address. […]
I just check FAP, there is no DMI. We can add DMI_BASE_SIZE = 0 in iomap.h. and add #if condition in soc/intel/common/block/acpi/acpi/northbridge.asl in separate CL:
#if DMI_BASE_SIZE
/* DMI BAR _BAS will be updated in _CRS below according to
* B0:D0:F0:Reg.68h
*/
Memory32Fixed (ReadWrite, 0, DMI_BASE_SIZE, DMIB)
#endif
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83635/comment/75530cbd_2021b814?us… :
PS82, Line 54: config SOC_INTEL_PANTHERLAKE_H
> > Can we add SOC_INTEL_PANTHERLAKE_U? Currently, we have […]
Sure. Let me also check with EDS owner for UFS section. In the mean time, let's remove ufs.asl for now.
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Change subject: mb/google/dedede/var/awasuki: Adjust I2C frequency to less than 400 KHz
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Patch Set 5: Code-Review+1
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Change subject: commonlib/bsd: Optimize strnlen()
......................................................................
Patch Set 2:
(1 comment)
File src/commonlib/bsd/string.c:
https://review.coreboot.org/c/coreboot/+/83933/comment/c26e6766_542db480?us… :
PS1, Line 28: ptr - str
> Just `maxlen`?
Yeah, that's a bit better, thanks!
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Hello Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83933?usp=email
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Verified+1 by build bot (Jenkins)
Change subject: commonlib/bsd: Optimize strnlen()
......................................................................
commonlib/bsd: Optimize strnlen()
This patch changes the strnlen() implementation to fix a small issue
where we would dereference once more byte than intended when not finding
a NUL-byte within the specified amount of characters. It also changes
the implementation to rely on a pre-calculated end pointer rather than a
running counter, since this seems to lead to slightly better assembly
(one less instruction in the inner loop) on most architectures.
Change-Id: Ic36768fd3a26e2b64143904e78cd0b52ba66898d
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/commonlib/bsd/string.c
1 file changed, 13 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/83933/2
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Change subject: soc/mediatek/mt8196: Enable mmu operation for L2C SRAM and DMA
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Patch Set 4: -Code-Review
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Change subject: mb/google/rauru: Initialize flash controller in bootblock
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