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Change subject: mb/google/brox: Reduce PL values for booting without battery
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83406/comment/dbd0ca7f_9737e82d?us… :
PS2, Line 161: soc_config->tdp_pl4 -= POWER_LIMIT_TUNE;
> Are you adjusting twice for PL4 - especially when PL4 > PL3? PL3 got adjusted in line 151. […]
Yes this intentional .It is recommended that Psyspl3 is set above psyspl2 by 1 or 2 Low PL4 does not cause functional failure but result in a loss in max obtainable frequency .A lower PL4 ensures that going lower than battery min voltage is prevented
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Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83502?usp=email )
Change subject: [only for test] use C23 dialect
......................................................................
[only for test] use C23 dialect
Change-Id: I43f1330cbac46ba580c541319dea1de154d47846
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/Kconfig
M src/lib/thread.c
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/83502/1
diff --git a/src/Kconfig b/src/Kconfig
index b778fe3..79c7a62 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -100,7 +100,7 @@
config ALLOW_UNSUPPORTED_C23
bool
- default n
+ default y
help
C23 dialect is under development. It is experimental and incomplete
This option is supported. Don't enable it.
diff --git a/src/lib/thread.c b/src/lib/thread.c
index 944c75e..554b9dc 100644
--- a/src/lib/thread.c
+++ b/src/lib/thread.c
@@ -251,7 +251,7 @@
set_current_thread(t);
- t->stack_orig = (uintptr_t)NULL; /* We never free the main thread */
+ t->stack_orig = (uintptr_t)(void *)nullptr; /* We never free the main thread */
t->id = 0;
t->can_yield = 1;
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Attention is currently required from: Martin L Roth, Nico Huber.
Hello Martin L Roth, Nico Huber, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: tree: Add kconfig option for testing C23 dialect
......................................................................
tree: Add kconfig option for testing C23 dialect
This adds C23 dialect for testing and prepare for C23 dialect support.
Change-Id: I07db866bebfd25f1a60d18a3228ada2957500234
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M Makefile.mk
M payloads/libpayload/Makefile
M payloads/libpayload/tests/Makefile.mk
M src/Kconfig
M src/include/stdbool.h
M src/include/stddef.h
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git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/83459/9
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Change subject: mb/google/rex/variants/screebo: Generate RAM IDs
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/amd: Ensure bank 0 is selected before accessing VBNV in CMOS
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Patchset:
PS4:
> based on my test, it doesn't change the disable_dev_request back to 0. […]
Re cherry-pick and test, it works.
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Change subject: mb/google/brox: Reduce PL values for booting without battery
......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83406/comment/1453c221_74ce2765?us… :
PS2, Line 9: Reduce PsysPL2 and PL4 values to boot without battery and prevent
> Please include "PsysPL3" changes in commit message body.
Acknowledged
https://review.coreboot.org/c/coreboot/+/83406/comment/cd1dd08f_b9f30042?us… :
PS2, Line 14: TEST=flash
> Please format into a single line and be bit more descriptive in the TEST definition. […]
Acknowledged
File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83406/comment/13c9c294_0373ca96?us… :
PS2, Line 152: psyspl3 = psyspl2;
> nit, combine line num 152, 153
Acknowledged
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Change subject: mb/google/brox: Reduce PL values for booting without battery
......................................................................
mb/google/brox: Reduce PL values for booting without battery
Tune PsysPL2 and PL4 values to boot to kernel without battery
and prevent brown-outs.Fix Psyspl3 value according to
Turbo Power Management Document.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on different Brox proto2 SKU1 boards
with 45W adapter and Brox proto2 SKU2 boards with 65W adapter
for 10 iterations of cold boot.
Change-Id: Ia0074bfc97c54f07d0b7257393de7c355e36b262
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/baseboard/include/baseboard/variants.h
2 files changed, 8 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/83406/4
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Change subject: mb/google/brox: Reduce PL values for booting without battery
......................................................................
mb/google/brox: Reduce PL values for booting without battery
Tune PsysPL2 and PL4 values to boot to kernel without battery
and prevent brown-outs.Fix Psyspl3 value according to
Turbo Power Management Document.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on different Brox proto2 SKU1 boards
with 45W adapter and Brox proto2 SKU2 boards with 65W adapter
for 10 iterations of cold boot.
Change-Id: Ia0074bfc97c54f07d0b7257393de7c355e36b262
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/baseboard/include/baseboard/variants.h
2 files changed, 9 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/83406/3
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Change subject: mb/google/brya/variants/trulo: Include hda_verb.c
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Patch Set 1: Code-Review+2
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