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Change subject: soc/intel/common/block/gpio/gpio.c: improve GPIO debug infos
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Patch Set 6:
(1 comment)
File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/c/coreboot/+/83316/comment/d97f2c20_8bfa50e1?us… :
PS6, Line 196: printk(BIOS_DEBUG, "GPE_EN[0x%02x, %02zu]: Reg: 0x%x, Value = 0x%08x\n",
> Why we need 'zu'? Is it a must for size_t?
zu is used to print unsigned size_t. This is required by Jenkins CI, I have to update it to change it.
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Change subject: soc/intel/common/intelblocks/gpio.h: allow specifying the pad ownership
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Patch Set 6:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83315/comment/195dd388_1d0673fb?us… :
PS2, Line 7: src/soc/intel/common/block/include/intelblocks/gpio.h
> This prefix is not supposed to be a full path to the file that is changed, but it could be though. […]
Done
File src/soc/intel/common/block/include/intelblocks/gpio.h:
https://review.coreboot.org/c/coreboot/+/83315/comment/7a72cd81_e35ea899?us… :
PS6, Line 125: uint16_t host_own_reg_0; /* offset to Host Ownership Reg 0 */
> can this be covered by the host_own_reg_0?
The pad_own_reg_0 is used to indicate whether this pad is owned by host software or Intel Management Engine. If owned by host software, it could be further configured to be owned by GPIO driver or ACPI.
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Change subject: soc/intel: Add Panther Lake PCIE device IDs
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Patch Set 15:
(1 comment)
Patchset:
PS15:
> May be some scope for improvement for in the code review. There are several wrong (several IDs are wrong, copied from LNL like GFX ID) and incomplete information (There are primarily 3 SOC and this CL only landed the IDs for one SKU w/o clarifying what is thart SKU) landed as part of this CL, which I had to fix using [CL]() and subsequent CLs.
CB:83490 onwards
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