coreboot-gerrit July 2024

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Increase CAR STACK_SIZE by 31KB to meet coreboo...
by Rishika Raj (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Julius Werner, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun. Rishika Raj has posted comments on this change by Rishika Raj. ( https://review.coreboot.org/c/coreboot/+/83540?usp=email ) Change subject: soc/intel/meteorlake: Increase CAR STACK_SIZE by 31KB to meet coreboot requirements ...................................................................... Patch Set 5: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/83540/comment/f4d01d0e_9740b325?us… : PS1, Line 2: rishikraj > Please use Rishika Raj: […] Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/c3ed380c_fce3fbe2?us… : PS1, Line 7: soc/intel/meteorlake: Change DCACHE_BSP_STACK_SIZE > Maybe even: […] Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/7b4fa1f4_1c10050d?us… : PS1, Line 8: > > `Possible unwrapped commit description (prefer a maximum 72 chars per line)` […] Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/aa005029_8d9638cf?us… : PS1, Line 9: as required by the coreboot > Please elaborate. Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/ec206abc_d6012b7a?us… : PS1, Line 9: 1KB to 512KB + 32KB > Use just one space where there are two? Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/e5ca5ac0_a2f3974a?us… : PS1, Line 11: Bug > BUG Acknowledged https://review.coreboot.org/c/coreboot/+/83540/comment/632e6e1c_bf44561c?us… : PS1, Line 12: Test > TEST Acknowledged Commit Message: https://review.coreboot.org/c/coreboot/+/83540/comment/38bf871a_c9f649d8?us… : PS2, Line 7: Incrase > typo? Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/83540?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iba3620b3b7c470176330f5e07989cd3f6238713e Gerrit-Change-Number: 83540 Gerrit-PatchSet: 5 Gerrit-Owner: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:39:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry
by Subrata Banik (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Paul Menzel, Rishika Raj. Subrata Banik has posted comments on this change by Rishika Raj. ( https://review.coreboot.org/c/coreboot/+/83555?usp=email ) Change subject: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83555/comment/25704331_ccc892ad?us… : PS2, Line 11: > Why was it added in the first place? I guess it might be a mistake -- To view, visit https://review.coreboot.org/c/coreboot/+/83555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I355e4cdf70fbbc049d92265b0dee62e1d1545e36 Gerrit-Change-Number: 83555 Gerrit-PatchSet: 2 Gerrit-Owner: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:25:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: southbridge/intel: Use azalia_audio_init() instead of duplicating code
by Paul Menzel (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Nicholas Sudsgaard, Nico Huber. Paul Menzel has posted comments on this change by Nicholas Sudsgaard. ( https://review.coreboot.org/c/coreboot/+/83504?usp=email ) Change subject: southbridge/intel: Use azalia_audio_init() instead of duplicating code ...................................................................... Patch Set 1: (1 comment) File src/southbridge/intel/i82801gx/azalia.c: https://review.coreboot.org/c/coreboot/+/83504/comment/f7bf42ba_cf269fe9?us… : PS1, Line 27: 0x0f > Not sure why these only use the first 4 bits as the codec mask (the specification uses 15 bits). Just mention the difference in the commit message? -- To view, visit https://review.coreboot.org/c/coreboot/+/83504?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie174ba29c115e3a3419362602d3e3175c9a03708 Gerrit-Change-Number: 83504 Gerrit-PatchSet: 1 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:23:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>

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[XS] Change in coreboot[main]: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry
by Eric Lai (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Rishika Raj. Eric Lai has posted comments on this change by Rishika Raj. ( https://review.coreboot.org/c/coreboot/+/83555?usp=email ) Change subject: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: So the internal CNVI BT doesn't route to the PORT10 now? -- To view, visit https://review.coreboot.org/c/coreboot/+/83555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I355e4cdf70fbbc049d92265b0dee62e1d1545e36 Gerrit-Change-Number: 83555 Gerrit-PatchSet: 2 Gerrit-Owner: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:22:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry
by Paul Menzel (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Rishika Raj. Paul Menzel has posted comments on this change by Rishika Raj. ( https://review.coreboot.org/c/coreboot/+/83555?usp=email ) Change subject: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83555/comment/e300f918_11837a7a?us… : PS2, Line 11: Why was it added in the first place? -- To view, visit https://review.coreboot.org/c/coreboot/+/83555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I355e4cdf70fbbc049d92265b0dee62e1d1545e36 Gerrit-Change-Number: 83555 Gerrit-PatchSet: 2 Gerrit-Owner: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:22:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry
by Rishika Raj (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Rishika Raj. Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83555?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry ...................................................................... mb/google/brya/variants/orisa: Remove dummy USB2 Port 10 entry This removes the dummy entry for usb2_ports[9] as it doesn't exist on the SoC as per USB2 port mapping. BUG=None TEST=emerge-nissa coreboot Change-Id: I355e4cdf70fbbc049d92265b0dee62e1d1545e36 Signed-off-by: Rishika Raj <rishikaraj(a)google.com> --- M src/mainboard/google/brya/variants/orisa/overridetree.cb 1 file changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/83555/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I355e4cdf70fbbc049d92265b0dee62e1d1545e36 Gerrit-Change-Number: 83555 Gerrit-PatchSet: 2 Gerrit-Owner: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[S] Change in coreboot[main]: mb/google/brya/var/trulo: Configure early and romstage GPIOs
by Eric Lai (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83568?usp=email ) Change subject: mb/google/brya/var/trulo: Configure early and romstage GPIOs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic1b84f61ef62ddbadc2a45758fb3fce90fce0e88 Gerrit-Change-Number: 83568 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:15:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya/var/trulo: Add fw_config for PDC
by Subrata Banik (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83567?usp=email ) Change subject: mb/google/brya/var/trulo: Add fw_config for PDC ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > So no PD connect to EC now? yes, similar to typical Intel windows HW design. -- To view, visit https://review.coreboot.org/c/coreboot/+/83567?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0a8fb0225edecb063dede31efaec6f2502476977 Gerrit-Change-Number: 83567 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:08:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>

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[S] Change in coreboot[main]: mb/google/brya/var/trulo: Configure early and romstage GPIOs
by Subrata Banik (Code Review) 19 Jul '24

19 Jul '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83568?usp=email ) Change subject: mb/google/brya/var/trulo: Configure early and romstage GPIOs ...................................................................... mb/google/brya/var/trulo: Configure early and romstage GPIOs This change adds early and romstage GPIO configurations for the trulo variant, including: Early GPIOs: - GSC (Google Security Controller) - WP (Write Protect) - UART0 (for serial debug) Romstage GPIOs: - Touch Screen early power sequencing CrOS GPIOs: - CROS_GPIO_VIRTUAL - GPIO_PCH_WP BUG=b:351976770 TEST=Builds successfully for google/trulo. Change-Id: Ic1b84f61ef62ddbadc2a45758fb3fce90fce0e88 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/trulo/gpio.c 1 file changed, 21 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/83568/1 diff --git a/src/mainboard/google/brya/variants/trulo/gpio.c b/src/mainboard/google/brya/variants/trulo/gpio.c index 1a6d1b1..fac1740 100644 --- a/src/mainboard/google/brya/variants/trulo/gpio.c +++ b/src/mainboard/google/brya/variants/trulo/gpio.c @@ -16,12 +16,29 @@ /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { - /* TODO */ + /* A17 : GPP_A17 ==> GSC_SOC_INT_ODL */ + PAD_CFG_GPI_APIC(GPP_A17, NONE, PLTRST, LEVEL, INVERT), + /* E3 : PROC_GP0 ==> SOC_WP_OD */ + PAD_CFG_GPI_GPIO_DRIVER(GPP_E3, NONE, DEEP), + /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ + PAD_CFG_GPI(GPP_F18, NONE, DEEP), + /* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */ + PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), + /* H5 : I2C0_SCL ==> SOC_I2C_GSC_SCL */ + PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), + /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */ + PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), + /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ + PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), }; /* Fill romstage gpio configuration */ static const struct pad_config romstage_gpio_table[] = { - /* TODO */ + /* Enable touchscreen, hold in reset */ + /* E17 : GPP_E17 ==> SOC_TS_PWR_EN */ + PAD_CFG_GPO(GPP_E17, 1, DEEP), + /* D15 : GPP_D15 ==> SOC_TS_I2C_RST# */ + PAD_CFG_GPO(GPP_D15, 0, DEEP), }; const struct pad_config *variant_gpio_table(size_t *num) @@ -43,7 +60,8 @@ } static const struct cros_gpio cros_gpios[] = { - /* TODO */ + CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), + CROS_GPIO_WP_AH(GPIO_PCH_WP, CROS_GPIO_DEVICE_NAME), }; DECLARE_CROS_GPIOS(cros_gpios); -- To view, visit https://review.coreboot.org/c/coreboot/+/83568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic1b84f61ef62ddbadc2a45758fb3fce90fce0e88 Gerrit-Change-Number: 83568 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: mb/google/brya/var/trulo: Add fw_config for PDC
by Eric Lai (Code Review) 19 Jul '24

19 Jul '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83567?usp=email ) Change subject: mb/google/brya/var/trulo: Add fw_config for PDC ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: So no PD connect to EC now? -- To view, visit https://review.coreboot.org/c/coreboot/+/83567?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0a8fb0225edecb063dede31efaec6f2502476977 Gerrit-Change-Number: 83567 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 19 Jul 2024 06:03:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit July 2024