Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83080?usp=email )
Change subject: mb/google/nissa/var/sundance: Increase I2C1 hold time to 126ns
......................................................................
mb/google/nissa/var/sundance: Increase I2C1 hold time to 126ns
According to the vendor spec, I2C1 hold time needs > 100ns.
System needs to adjust the I2C1 sda_hold value from 7 to 13,
the system will change the I2C1 hold time from 70ns to 126ns.
BUG=b:347157276
TEST=built bootleg and verified test result by EE team
Change-Id: I722ec93177b6debf6b4c99de2df68c942560a3ff
Signed-off-by: Roger Wang <roger2.wang(a)lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83080
Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org>
Reviewed-by: Eric Lai <ericllai(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal(a)google.com>
---
M src/mainboard/google/brya/variants/sundance/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Paul Menzel: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Kapil Porwal: Looks good to me, approved
Eric Lai: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/sundance/overridetree.cb b/src/mainboard/google/brya/variants/sundance/overridetree.cb
index 72cb317..03450d4 100644
--- a/src/mainboard/google/brya/variants/sundance/overridetree.cb
+++ b/src/mainboard/google/brya/variants/sundance/overridetree.cb
@@ -128,7 +128,7 @@
.speed = I2C_SPEED_FAST,
.scl_lcnt = 157,
.scl_hcnt = 79,
- .sda_hold = 7,
+ .sda_hold = 13,
}
},
.i2c[3] = {
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Change subject: util: Move remainings from ipqheader to qualcomm directory
......................................................................
Patch Set 4:
(1 comment)
File util/qualcomm/description.md:
https://review.coreboot.org/c/coreboot/+/83028/comment/039a4fb3_1a3e8393?us… :
PS3, Line 6: `Python`
> looks like the two lines related to ipqheader. […]
indeed, Thank you !
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Change subject: soc/intel/xeon_sp: Reserve MMIO range for VTd BAR dynamically
......................................................................
Patch Set 14:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82431/comment/dfafe098_ee33a61d?us… :
PS12, Line 9: vtd_probe_bar_size is used to decide the BAR size.
> This is good idea, will check. […]
Hi Nico, Arthur,
This proves to work on SPR/GNR by reading PCI config space 0x180 of MMAP VTd devices (0x8086, 0x09a2).
While we have one open to discuss, besides Xeon-SP codes, the ACPI codes also needs to refer to the VTD bar size, e.g.
https://review.coreboot.org/c/coreboot/+/82429.
For this we might have 2 solutions.
Solution #1 - to invoke https://review.coreboot.org/c/coreboot/+/82430 when CONFIG_SOC_INTEL_COMMON_BLOCK_VTD selected, and to return 4KiB otherwise.
Solution #2 - to define a weak function returning 4KiB but to override in Xeon-SP codes by checking MMAP VTd PCI config space 0x180.
Your opinion?
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Change subject: mb/google/brya/var/nivviks: Add wake config for CNVi
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Patch Set 3: Code-Review+2
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Change subject: mb/google/brya/var/nivviks: Enable PCIe Wifi Gpios based on fw_config
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Change subject: mb/google/brya/var/nivviks: Add fw_config fields for wifi6 and wifi7
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83074/comment/e4b64b23_983d707a?us… :
PS6, Line 7: brya
> nissa
Directory path is still `src/mainboard/google/brya/variants/nivviks`
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Change subject: util/ifdtool: Add Panther Lake platform support under IFDv2
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Patch Set 3: Code-Review+2
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I'd like you to reexamine a change. Please visit
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Change subject: util/ifdtool: Add Panther Lake platform support under IFDv2
......................................................................
util/ifdtool: Add Panther Lake platform support under IFDv2
BUG=b:347669091
TEST=Able to build ifdtool.
Change-Id: Id261898932f11f4c9066453bce18fd889996e171
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---
M util/ifdtool/ifdtool.c
M util/ifdtool/ifdtool.h
2 files changed, 27 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/83141/3
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Change subject: region: Introduce region_create() functions
......................................................................
Patch Set 7:
(1 comment)
File util/cbfstool/cbfstool.c:
https://review.coreboot.org/c/coreboot/+/79905/comment/9ac6274e_ea3b922c?us… :
PS7, Line 331: 1
> Right - I guess just CB_SUCCESS & CB_ERR. […]
Hmm, I guess I just mimicked what the first caller did. Now looking at the
second, that seems inconsistent already. But I wouldn't want to mix in a
third style.
If somebody wants to clean this up as a whole, I wouldn't mind.
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